鎖相鑒頻器 的英文怎麼說
中文拼音 [suǒxiāngjiànbīnqì]
鎖相鑒頻器
英文
phase locked frequency discriminator- 鎖 : Ⅰ名詞1 (安在開合處使人不能隨便打開的器具) lock 2 (姓氏) a surname Ⅱ動詞1 (上鎖) lock up 2 ...
- 相 : 相Ⅰ名詞1 (相貌; 外貌) looks; appearance 2 (坐、立等的姿態) bearing; posture 3 [物理學] (相位...
- 鑒 : Ⅰ名詞1 (鏡子 古代用銅製成) ancient bronze mirror2 (可以作為警戒或引為教訓的事) warning; objec...
- 頻 : Ⅰ形容詞(次數多) frequent Ⅱ副詞(屢次) frequently; repeatedly Ⅲ名詞1 [物理學] (物體每秒鐘振動...
- 器 : 名詞1. (器具) implement; utensil; ware 2. (器官) organ 3. (度量; 才能) capacity; talent 4. (姓氏) a surname
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The designs of the pfd, digital filter ocxo and fractional - n counter in the frequency synthesizer unit are discussed, based on the pll theory. in order to improve the precision of pll, some design methods of pfd are given, and its feasibility is validated by the fpga hardware implement
2 .在鎖相理論指導下,第三章討論了頻率合成器設計中的鑒頻鑒相器、數字濾波器、恆溫壓控振蕩器和分頻電路設計。為了進一步提高頻率合成的精度,文中給出了提高鑒頻鑒相器性能的一些設計思想,結合fpga的硬體設計驗證了其可行性。For digital audio encoding and decoding modules, delta - sigma modulation is introduced and audio data, preambles with accessorial data are multiplexed according to the digital audio interface standard ; for carrier wave, pll frequency synthesizer is used ; for frequency modulation, voltage control oscillator is taken ; for demodulation, pll frequency discrimination is adopted
調制方式,並按照數字音頻介面標準對音頻數據、同步字和附加信息進行通道復用;對于載波信號,採取鎖相環頻率合成技術手段;對于頻率調制,採用壓控振蕩器;對于解調電路,採取鎖相環鑒頻電路。Research on chaotic phenomena of phase - locked frequency detector with triangular phase - detector
三角形鑒相特性鎖相鑒頻器中混沌現象的研究In this paper, a ku band frequency source based on sampling phase lock loop technique is introduced. the vco of the loop is designed using dielectric resonator. the theory and design method is discussed and emphasized on
本文介紹了一個應用取樣鑒相和鎖相原理製作的微波ku波段頻率源(頻率合成器) ,其中的壓控振蕩器部分是用介質諧振器( dr )設計的。The basic operation principle of phase - locked frequency synthesizer and the type of circuits are expatiated systematicly in this paper. the principle of operation on sampling phase detector and some characteristics including the linear tracking and phase noise in phase loop circuits are analyzed deeply. the research is emphased on the theory and design method of circuits in the sampling phase - locked frequency synthesizer. then, the expansion capturing circuit is analyzed and designed for better performance of capturing loop circuits. at last, the loop filter is also analyzed and contrived taking account of effection of additional phase shift by the sampling - holder. the general research on the theory and technology of sampling phase lock in the paper will make a basement for the development of new product
本文系統的闡述了鎖相頻率合成器的基本工作原理及電路類型;較深入地分析了取樣鑒相工作原理及電路、鎖相環路的線性跟蹤特性和相位噪聲特性;重點對取樣鎖相頻率合成器電路理論和設計方法進行了研究;為了改善環路的捕獲性能,對擴捕電路進行了分析和設計,並用wewb32軟體對電路進行了模擬;考慮到取樣保持器的附加相移影響,對環路濾波器進行了分析和設計。In this paper, a pll frequency synthesizer working in l band is researched. at fist, we review the basic of phase lock loop and it ' s constituent part. after that the basic conception and design method of pll frequency synthesizer was introduced, especially introduced the charge pump pll frequency synthesizer in detail
本文是採用鎖相原理設計的l波段頻率合成器,首先對鎖相環路的工作原理和基本組成部分進行了簡單的介紹,然後介紹了鎖相頻率合成器的原理和設計方法,主要介紹了目前小型頻率合成器產品中使用最廣泛的由電荷泵數字鑒頻鑒相器和無源環路濾波器構成的頻率合成器。Then according to the emphasis of the design, went deeply into the theory of pll frequency synthesizers widely used, described pll ’ s working principle, structure and several types in detail, and made research and analysis of pll frequency synthesizers ’ phase noise, including the effect of the active loop filter on the phase noise, and give some methods to make improvement as well, such as changing loop filter form, reducing divide number, and increase phase detector frequency, etc. then paper introduced the principle character and phase noise analysis of direct digital frequency synthesizer ( dds ) and injection phase lock circuit, which are also important circuits in the design
論文首先對幾十年頻率合成器的發展進行概述,而後針對本次設計的重點,對應用較為廣泛的鎖相頻率合成理論進行了深入的探討,詳細介紹了鎖相環的工作原理、組成結構和鎖相類型,並對鎖相頻率合成器的相噪特性進行了研究分析,包括有源環路濾波器對于相噪的影響,提出了改善相位噪聲的幾點措施:改善環路形式、降低分頻數、增大鑒相頻率等。接著介紹了直接數字頻率合成器( dds )和注入鎖相電路的原理特點以及相噪分析,它們也是本次設計的重要電路。First, an analysis for the design of the impulse phase lock oscillate, which includes impulse phase detector the dielectric resonant oscillate etc. secondly, presents an analysis for the design of wide band balanced low noise amplifier. the last two part simplify the theory and the electrical characteristics of the sub harmonic mixer, and the mmvco
第一部分著重介紹了脈沖鎖相源的工作原理(主要包括取樣鑒相器和介質穩頻的壓控振蕩器) ,並介紹了研製結果的性能指標;第二部分介紹了平衡式寬帶低噪聲放大器的基本理論The thesis describes a prototype fractional frequency synthesizer which is supported by a project granted by the ministry of science and technology of pr china. firstly, based on the principle of pll, this paper briefly describes three basic pll components : phase detector ( pd ), low pass filter ( lpf ), voltage controlled oscillators ( vco ), analyzes the linearized pll and summaries the transfer functions of third - order pll with ideal intergrator filter respectively. based on a microwave vco, the single point frequency pll frequency ranging from 2. 2 to 2. 5ghz is developed
首先,從鎖相環的基本理論、原理出發,分析了鎖相環中的三個基本部件:鑒相器、環路濾波器和壓控振蕩器,此後,針對線性化鎖相環進行了分析,研究了在使用比例積分濾波器時,三階鎖相環的環路參數計算;在電路實現時選用了lmx2353 ,在此基礎上,完成了2 . 2 ~ 2 . 5ghz范圍內的小數頻率合成器設計。On the basis of analyzing the old system and theory, the element circuits of wireless digital audio transceiver modules are designed in detail including the digital audio encoding and decoding circuits with the surrounding circuits, the fsk circuit based on pll frequency synthesizer, the power amplifier circuit, the frequency discrimination and agc circuit
在分析原系統結構和理論的基礎上,完成了整個無線數字音頻傳輸模塊各單元電路的設計。主要包括有數字音頻編碼和解碼電路及外圍電路的設計、基於鎖相頻率合成器理論的fsk電路設計、功率放大器的設計、鑒頻與agc控制電路的設計。But its performance is as same as common pll at a 5v voltage. so the pll performance is better than other plls at a 5v voltage, especially in power consumption and frequency. finally, the improved pll circuit used in the frequency synthesizer is composed of the improved vco, phase / frequency detector and charge pump. hspice simulation results show that the pll performance is better than other plls implemented by other vco in the same cmos technology
綜合以上的研究與設計,本文用所改進的壓控振蕩器、無死區鑒相器及電荷泵電路組成了用於頻率合成的鎖相環電路,並對此電路進行整體設計及模擬,結果表明其在鎖定時間、頻率范圍、輸出相位抖動及功耗方面具有較好的性能,且對提高鎖相環頻率合成器的整體性能有一定的作用。The fourth, mainly talk about the phase noise in the pll, and discuss the specific affect on out put phase noise caused by different components in frequency synthesizer, such as mixer, amplifier, multipler, divider, oscillator, phase detector etc. the last part is about how to choice the natural frequency of pll in order to get the better performance in phase noise
第二章從鎖相環的基本原理出發,介紹了鎖相環的幾個基本部件:鑒相器?環路濾波器和壓控振蕩器,對線性化鎖相環進行了詳細的分析,對數字鎖相環做了詳細的介紹,分析了鎖相環的相位噪聲模型,討論了頻綜中的混頻器分享友人