門電路 的英文怎麼說

中文拼音 [méndiàn]
門電路 英文
gatecircuit
  • : Ⅰ名詞1 (房屋、車船等的出入口 ) entrance; exit; door; gate 2 (形狀或作用像門的東西) switch; va...
  • : Ⅰ名詞1 (有電荷存在和電荷變化的現象) electricity 2 (電報) telegram; cable Ⅱ動詞1 (觸電) give...
  • : 1 (道路) road; way; path 2 (路程) journey; distance 3 (途徑; 門路) way; means 4 (條理) se...
  • 電路 : [訊] circuit (ckt); electric circuit; electrocircuit電路板 circuit board; 電路保持 guard of a c...
  1. The component gate opens at the beginning of the peak.

    在波峰開始時,門電路打開。
  2. A control pulse transmitted to a gate or other digital device to release data at a precise instant, usually by the cpu

    一種控制脈沖,通常由cpu在某個準確時間傳輸到門電路或其它數字設備以釋放數據。
  3. The trigger electronic module consists of 3 discriminators and a coincidence unit which performs a 2 - out - of - 3 logic gate. hence either 2 detectors or 3 detectors receiving cosmic ray signal will trigger daq

    觸發模組由三個鑒別器和一個與門電路組成。當有兩塊或以上的探測器同時產生訊號,該便會觸發數據收集。
  4. The designed gates have simple configuration, they also have the advantages that quantum devices possess, so they can suit the requirement of vlsi

    論文設計了基於rt量子器件的二值與非與或非,設計的門電路結構簡單,並具有量子器件所具有的速度快、功耗低、集成度高等優點。
  5. . auto - restart counter circuit made the circuits to be controlled perfectly

    主控門電路實現各子對功率ldmos的最終控制並驅動功率管。
  6. The teaching difficulty of the course of digital circuit basis mainly focuses on some knowledge of components, for example, semiconductor basis, separation and integration logic gate circuits

    摘要《數字基礎》課程的教學難點主要集中在半導體基礎、分立和集成邏輯門電路等元器件知識部分。
  7. The problem in high speed signal process, such as parasitic parameter and gate delay is also the difficulty hi the research

    生成高速,穩定的時鐘信號是本課題的目標。高速信號處理所遇到的常見問題,如寄生參數,門電路延遲是設計難點。
  8. Sorting algorithm can solve logic gate circuit for more fanout, more loop nestification and feedback alternately. we sort these nodes according to their joint relationship by the sort algorithm that can determine the priority order of digital circuit simulation and give the feedback chain

    排序演算法可以解決具有多扇出、多迴嵌套及交叉反饋的邏輯門電路,按照其連接關系進行排序,並給出其中的最大反饋鏈。
  9. In order to enhance the applying efficiency of cl, the cause of premature convergence in binary - coded genetic algorithms ( gas ) is analyzed in this dissertation. the drawback of conventional mutation operator in preventing premature convergence is subsequently pointed out. whereafter, a genetic algorithm, which can be implemented via general logic gate circuit, is proposed

    為了提高計算智能的應用效率,本文分析了二進制遺傳演算法中早熟收斂的成因,指出了傳統的變異運算元在防止早熟收斂方面的不足,提出了一種能有效預防早熟現象的二元變異運算元,並在此基礎上提出了一種便於用常規邏輯門電路實現的遺傳演算法。
  10. With the rapid development of semiconductor, digital integrated circuit ( p, memory, standard logic gates, etc. ) and advance computer technology, the various measuring instruments ( virtual instruments ) with the powerful function of pc are produced in different industrial and scientific research fields. as we all known, the traditional instruments are usually built with discrete components and small scale ics, the disadvantages are obvious in system design, debugging and maintenance

    隨著半導體技術與數字集成(微處理器、存貯器以及標準邏輯門電路等)技術的迅速發展,特別是隨著計算機技術的發展,在工業生產和科學技術研究的各行各業中,人們利用pc機的強大處理功能代替傳統儀器的某些部件,開發出各種測量儀器(虛擬儀器) ,傳統儀器的數字邏輯部分多是採用分立集成( ic )組成,分立ic愈多,給系統的設計、調試及維護帶來諸多不便。
  11. A high - speed sampling system for echo signal of impulse gpr based on equivalent time sampling method is presented, and significant circuits including step sampling pulse generator and sampling gate circuit are designed

    摘要提出了一種基於等效時間采樣方法的沖擊型探地雷達回波信號高速采樣系統,設計實現了等效時間采樣的關鍵,包括步進采樣脈沖發生器、采樣門電路
  12. A gate that performs the boolean operation of implication

    執行「蘊含」布爾操作的一種(邏輯)門電路
  13. A circuit with multiple inputs and one output that is energized only when a designated set of input pulses is received

    選通極,門電路具有多個輸入端和一個輸出端,只有當一套指定的輸入端受到脈沖時才有能量
  14. A 4 - tuple ( v, f, h1, h0 ) is used to express the waveform of a signal line l in a period. the output tuple calculating method for all elementary gates is given

    本文採用一個四維立方( v , f , h _ 1 , h _ 0 )來表示信號線在某一時間段內的波形並給出了所有門電路的輸出立方計算方法。
  15. Semiconductor devices - integrated circuits - part 2 : digital integrated circuits - section one - blank detail specification for bipolar monolithic digital integrated circuit gates excluding uncommitted logic arrays

    半導體器件集成第2部分:數字集成第一篇雙極型單片數字集成門電路
  16. An electrical gate or mechanical device which implements the logical or operator. an output signal occurs whenever there are one or more inputs on a multichannel input. an or gate performs the function of the logical " inclusive or operation "

    一種實現邏輯「或」演算法的門電路或機械器件。當在其多通道輸入端有一個或多個輸入時就產生一個輸出信號。 「或」實現邏輯「或操作」的功能。同orelement 。
  17. In view of the decline of the reliability of door control in dc01 electrical train, this paper introduces the control system for passenger compartment door and the causes of the failure, and argues that the improvement of the door control delay, the opening circuit and the limit switch is the key to enhance the reliability of door control and to reduce the vehicle fault

    摘要針對上海地鐵dc01型動列車客室車氣控制系統可靠性下降的問題,介紹了車氣控制系統,分析產生車氣故障的根本原因,從控繼器、開門電路、車限位開關等方面對車氣控制系統進行改造,提高了控系統的氣可靠性,有效降低了車的故障率。
  18. Using it, time amplitude converter and pulse neutron generator, the y spectra of 14mev pulse neutrons is measured. utilizing the time difference of several different reactions about the interaction of neutrons and nucleus, the whole spectra and the capture spectra are measured. a method that uses double gate subtracting background to gain the fast neutrons " inelastic scattering y spectra is introduced

    研製了一種線性門電路,介紹了它與脈沖中子發生器、多道脈沖幅度分析器配合,進行14mev脈沖中子譜的測量,利用中子和原子核相互作用的幾種反應在時間上的差異,測量了總譜和俘獲譜,採用雙減本底方法得到了快中子非彈性散射譜。
  19. Specification for harmonized system of quality assessment for electronic components - semiconductor devices - integrated circuits - blank detail specification - bipolar monolithic digital integrated circuit gates excluding uncommitted logic arrays

    子元器件質量評定協調體系.半導體器件.集成.空白詳細規范.雙極單片式數字集成門電路
  20. The pulse neutron generator " s delaying time are measured by the time - amplitude converter and multichannel pulse amplitude analyzer. according to these times, the linear gate circuit " s opening time can be adjusted

    用它和多道脈沖幅度分析器配合測量脈沖中子發生器發射中子的滯后時間,據此調整線性門電路的開時間。
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