閾值邏輯 的英文怎麼說

中文拼音 [yùzhíluó]
閾值邏輯 英文
threshold logic
  • 閾 : 名詞1. [書面語] （門坎兒） threshold; doorsill2. （界限; 范圍） threshold
  • 邏 : Ⅰ動1. （巡察） patrol 2. [書面語] （遮攔） blockⅡ名詞1. （巡察） patrol 2. [書面語] （山溪的邊緣） edge
  • 輯 : Ⅰ動詞（編輯; 輯錄） collect; compile; edit Ⅱ名詞（整套書籍、資料的各個部分） part; volume; division
  • 邏輯 : logic
  1. Taking the advantage of the characteristic of nonlinear multi - zone partition in multi - dimension of mtn, an approach of employing mtn for archiving arbitrary digital logic was proposed. according to this approach, the xor operation which needs three stns to achieve was implemented using single mtn

    然後對多閾值神經元及其輸出特性作了詳細分析，利用多閾值神經元具有在多維空間中多區域非線性劃分的特點，提出了用一個多閾值神經元實現任意數字邏輯的規范方法。
  2. Threshold logic of a decision function is used to evaluate the generated residual so as to enhance the robustness of fault detection systems

    採用閾值邏輯方法評價所產生的殘差信號，以提高故障檢測系統的魯棒性。
  3. High threshold logic

    高閾值邏輯
  4. The synthesis of arbitrary boolean functions based on threshold logic gate

    基於閾值邏輯門的任意布爾函數綜合
  5. In this paper we discuss mca circuit, the sequential logic for mca data collection, for the setting of the uld, lld and the gain of pga, as well as the combinational logic for decoding circuits of the computer interface, based on cpld

    本文詳細論述了利用cpld實現的脈沖幅度多道電路及其數據採集的時序控制邏輯、閾值設定和程式控制放大倍數設定的時序控制邏四川大學碩士學位論文輯、以及與計算機介面的譯碼電路等組合控制邏輯。
  6. All the power devices including main switches and auxiliary switches are in soft - switching condition ( zvs or zcs ), while the freewheeling diodes are turned off in zero current condition. besides, the control of resonance between inductance and capacitor can be easily realized without needing of setting the threshold values of the inductance current

    該電路中主開關和輔助開關均滿足zvs或zcs條件，續流二極體也工作在軟關斷方式，並且電感和電容之間的諧振控制不需要設定電感電流閾值，控制邏輯簡單，可實現四象限運行。
  7. Variable threshold logic circuit

    可變閾值邏輯電路
  8. Variable threshold logic

    可變閾值邏輯
  9. Threshold logic circuit

    閾值邏輯電路
  10. This thesis is concerned with fault detection and isolation problem for dynamic systems such as norm - bounded uncertain systems, state - delayed uncertain systems, linear parameter - varying systems with time delays, time - delay systems with markovian jump parameters and nonlinear systems by using fault detection filter, threshold selection method and linear matrix inequalities

    本論文研究了動態系統的魯棒故障檢測與分離問題，基於故障檢測濾波器和閾值邏輯方法，採用線性矩陣不等式技術，研究了范數有界不確定系統、時滯不確定系統、時滯lpv系統、時滯馬爾可夫跳躍系統、非線性系統的魯棒故障檢測與分離問題。
  11. Eight sub - projects will be set up in the project by comprehensively considering the integrity and logic of the project and the synchronism and independence between the topics of sub - projects : 1 ) binary water cycle pattern and mechanism of water resource evolution in the haihe river basin ; 2 ) mechanisms for water cycle - driven ecological evolution and restoration in the haihe river basin ; 3 ) mechanisms of water environment evolution and basis for water pollution control in the haihe river basin ; 4 ) integrated simulation and forecast of water cycle and accompanying processes in the haihe river basin ; 5 ) water cycle - based basic theories and methodology for the assessment of utility of water resource utilization ; 6 ) process of farmland water cycle and mechanisms of high efficiency agricultural water utilization in the haihe river basin ; 7 ) mechanisms of evolution of binary water cycle system and safe, high efficiency water use in cities ; and 8 ) thresholds and patterns for the integral multi - dimensional critical control of water cycle in the haihe river basin

    綜合考慮項目研究的整體性、邏輯性，以及課題研究的同步性、獨立性，項目將設置八個課題：海河流域二元水循環模式與水資源演變機理；水循環驅動下的海河流域生態演變與修復機理；海河流域水環境演化機理與水污染防治基礎；海河流域水循環及其伴生過程的綜合模擬與預測；基於水循環的水資源利用效用評價基礎理論與方法；海河流域農田水循環過程與農業高效用水機制；城市二元水循環系統演化與安全高效用水機制；海河流域水循環多維臨界整體調控閾值與模式。
  12. Proceeding from the mission of reducing neuron numbers in neural networks ( nns ) and enhancing the information processing abilities of single neuron, as well focusing on the digital logic implementation by multi - thresholded neurons ( mtns ), this dissertation makes it possible that digital logic can be implemented by a small number of neurons and the nns realized digital logic may have high information density

    論文從減少神經網路中神經元個數及提高單個神經元信息處理能力兩個角度出發，以數字邏輯的多閾值神經網路實現作為研究內容，提出用較少的神經元實現數字邏輯，並且使實現的數字邏輯具有較高信息密度的可能性。
  13. Begin with analysis of binary logic implementation by single - thresholded neuron ( stn ), we drew a conclusion that digital logic implementation by neuron is actually a classification problem in multi - dimension space. meanwhile, we pointed out the demerits of soluting such problem by stn. then, the mtn and its transfer function was discussed particularly

    首先從二值數字邏輯的單閾值神經元實現的分析入手，通過對一個例子的分析，得出用神經元實現數字邏輯實為一個在多維空間中分類問題的結論，同時指出單閾值神經元在解決這一問題時存在的缺陷。
  14. Hence, the advantage of mtn over stn was shown with the facts that the nns need fewer neurons by using mtns than by using stns. in addition, the literal, and, or operation as three basic operations in ternary logic were separately implemented by single mtn. with these basic mtns, arbitrary ternary function can be achieved by nns

    利用這一方法，用一個多閾值神經元即實現了需三個單閾值神經元方能實現的異或運算，由此大幅減少了神經元個數；用一個多閾值神經元分別實現了三值邏輯中的文字、與、或三種基本運算，由這三種基本運算的多閾值神經元，可組成實現任意三值函數的多閾值神經元網路，由於提高了單個神經元信息處理的能力，使神經網路可實現復雜的多值邏輯，性能得以提高。
  15. Due to the enhancement of the information processing abilities of single neuron, the nns can realize the multi - valued logic ( mvl )

    在對數字邏輯的多閾值神經元實現理論研究的基礎上，探討多閾值神經元電路設計及實現的方案。
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