陣列集成電路 的英文怎麼說

中文拼音 [zhènlièjíchéngdiànlù]
陣列集成電路 英文
array device
  • 陣 : Ⅰ名詞1 （作戰隊伍的行列或組合方式） battle array [formation]: 布陣 deploy the troops in battle fo...
  • 列 : Ⅰ動1 （排列） arrange; form a line; line up 2 （安排到某類事物之中） list; enter in a list Ⅱ名詞1...
  • 集 : gatherassemblecollect
  • 成 : Ⅰ動詞1 （完成; 成功） accomplish; succeed 2 （成為; 變為） become; turn into 3 （成全） help comp...
  • 電 : Ⅰ名詞1 （有電荷存在和電荷變化的現象） electricity 2 （電報） telegram; cable Ⅱ動詞1 （觸電） give...
  • 路 : 1 （道路） road; way; path 2 （路程） journey; distance 3 （途徑; 門路） way; means 4 （條理） se...
  • 陣列 : [統計學] array陣列處理機 array processor; 陣列印表機 array printer; 陣列雷達 [電學] array radar
  • 集成 : integration集成晶體管 integrated transistor; 集成元件 integrated component
  • 電路 : [訊] circuit （ckt）; electric circuit; electrocircuit電路板 circuit board; 電路保持 guard of a c...
  1. Secondly an infrasonic array was constructed. the array is made up of three detectors with about 1 kilometer distance between each other. the three detectors are connected with telephone line

    其次構建次聲陣列，用三個相距約一公里的次聲探頭構成次聲三元接收陣，它們之間用電話線傳輸數據，合理地布置各陣元的位置和方位，三路信號通過採集卡上的不同通道號輸入計算機。
  2. The whole part of the data acquisition is build in a computer as two data acquisition cards. they are front card and rear card. the front card composed of four modules. they are : coin circuit module, data flow controller module, sdram array module and system bus interface module. the rear card composed of four odules. they are : asynchronous serial port interface module, adc control odule, ecg signal process module and gate control data produce module

    數據採集模式實現部分的大部分工作是在前面板上完成的，後面板主要是一些外圍電路。前面板採集卡上從物理上來說主要有四塊電路:符合電路，數據流控制器電路， sdram陣列和系統總線介面電路組成。後面板採集卡從總體物理上主要有四塊電路組成: 485串列通信電路， adc控制電路，心電數據處理電路和門控信號產生電路。
  3. Pld refer to the programmable logic device. it is a kind of chip that can be written the design of integrated circuits into its logic arrays

    Pld是指可編程邏輯器件，是一種可將集成電路的設計用編程的方式寫入到其邏輯陣列結構中的一種晶元。
  4. Given an m x n mesh - connected vlsi array with some faulty elements, the reconfiguration problem is to find a maximum - sized fault - free sub - array under the row and column rerouting scheme

    可重構vlsi陣列中低功耗子陣列的構造演算法多處理器陣列結構的大規模集成電路系統具有結構規整易於實現的特點。
  5. Field programmable gate arrays ( fpga ) can be programmed in the field to implement any logic circuits of requirement from user. because of their reprogrammability, they are good candidates for rapid system prototyping

    現場可編程門陣列（ fpga ）器件能通過對其進行編程實現具有用戶規定功能的電路，因而特別適合集成電路的新晶開發和小批量asic電路的生產。
  6. In this study, the design procedures for mitigating radiation effects mechanisms have been implemented in a gate array design, we have obtained samples of integrated circuits test structures manufactured by wuxi csmc - hj using their 0. 6 - m cmos process

    在研究中，我們將降低輻射效應的設計方法應用到門陣列設計中，獲得了華晶上華半導體有限公司採用0 . 6 m的cmos工藝生產的集成電路樣片，具有100krad （ si ）的抗總劑量輻射能力。
  7. And then, aiming at the deficiency of conventional design, the high - compositive fpga ( filed programmable gate array ) chip is used as the core in this project to deal with the signal of six encoders in real time

    其次針對以往設計的不足，採用了以高度集成的fpga （現場可編程邏輯陣列）晶元為核心的設計方式，實現六路光電編碼器信號的同步實時處理。
  8. Detail specification of ceramic pga for semiconductor integrated circuits

    半導體集成電路陶瓷針柵陣列外殼.詳細規范
  9. Gate array design generals for semiconductor integrated circuits

    半導體集成電路門陣列設計總則
  10. In the software design part, the image encoding is realized with huffman encoding on the bubbling up sorting method for 256 gray - color values. the result of the encoding and encoding efficiency are displayed in the list box. in the hardware design part, on the basis of the characteristic and development of the embedded system hardware, the code joint is realized with the fpga and vhdl

    在紅外虛擬鍵盤的軟體實現部分，採用哈夫曼（ huffman ）編碼的方法實現了圖像編碼，利用冒泡法對256個灰度值進行排序，最後將編碼結果以及編碼效率等以列表框的形式顯示；在硬體設計部分，基於目前嵌入式系統硬體的特點及發展，採用可在線修改的現場可編程門陣列fpga （ fieldprogrammablegatesarray ）技術以及高速集成電路硬體描述語言vhdl （ veryhighspeedintegratedcircuitshardwaredescriptionlanguage ）等方法實現圖像處理中的碼字拼接功能。
  11. And the controller based on vhdl ( very high speed integration circuit hardware description language ) was designed under the fpga ( field programmable gates array ) integration environment with the values gained from the train of the neural network using matlab

    氣動柔性手指神經網路控制器是在已經對氣動柔性手指進行運動學和動力學分析的前提下，使用matlab對神經網路進行試訓，依據訓練所得的權值和閾值，在現場可編程門陣列集成環境下，基於超高速集成電路硬體描述語言完成的。
  12. Aiming at the need of agility of switching in the data communication system, we design the switching matrix net which used analog switching integrate circuit

    針對數據通信系統中線路自動控制及靈活轉接的需要，設計了採用模擬開關陣列集成電路的級連，來構成交換矩陣網路。
  13. For the high - speed digital signal processing, the structure of fpga and dsp is widespreadly adopted. dsp is more featured in the implementation of complicated algorithm, while field programming gate array ( fpga ) shows more advantage in its flexibility of design, simplicity of system configuration, modification and maintenance. in the paper, the hardware system of the spaceborne radar is based on the structure of fpga and dsp, of which the signal processing part is accomplished with one fpga chip and multi dsps

    Dsp適合完成結構復雜的演算法;現場可編程邏輯陣列（ fpga ）適合完成高效、演算法固定的任務;與專用集成電路（ asic ）相比， fpga優點主要在於其很強的靈活性、可在線配置、修改和維護方便等優點。本文工程中的星載雷達信號處理和控制系統就是採用dsp + fpga的方式。其中信號處理採用的是xilinx公司的virtex -和virtex系列fpga和多片analogdevices公司的tigersharcts101的硬體電路結構。
  14. Cmos process is used to realize the one chip integration of the sensor array and processing circuits, which accords with the development direction of soc ( system on a chip ) and smart sensor

    傳感器使用標準cmos工藝製造，將傳感陣列與信號處理電路集成在同一晶元上，可以實現傳感器的soc集成和智能化（ smartsensor ）設計。
  15. It details the ic design process and vlsi circuits, including gate arrays, programmable logic devices and arrays, parasitic capacitance, and transmission line delays

    它詳細規定了集成電路設計過程和超大規模集成電路電路，包括門陣列，可編程邏輯器件和陣列，寄生電容，及輸電線路的延誤。
  16. The use of edgeless nmos transistors in place of 2 - edgeless transistors eliminates the excessive radiation - induced edge leakage in many cmos parts after irradiation

    為了測試最新設計的1萬門cmos門陣列的抗輻射水平，本文設計了一個cmos集成電路測試樣片。
  17. Fpga ( field programmable gate arrays ) is a new type of ic ( integrated circuit ) in recent years. it has advantages of compactness 、 economy 、 high speed 、 low consumption 、 full integration and good applicability. it is easy to be developed and be maintained

    現場可編程門陣列器件（ fieldprogrammablegatearrays ）是近年來嶄露頭角的一類新型集成電路，它具有簡潔、經濟、高速度、低功耗等優勢，又具有全集成化、適用性強，便於開發和維護（升級）等顯著優點。
  18. Semiconductor integrated circuits. detail specification for type jb3081, jb3082 transistor arrays

    半導體集成電路. jb3081 jb3082型晶體管陣列詳細規范
  19. In part ii a novel designed electronic tongue is developed, which is a multiopto - sensoriccard * based optical ditch system for online liquid detection. compared with traditional e - tongue, the sensing mechanism of our system is based on spectrum analysis technique. three actual measuremental results presented in the thesis demonstrate the validity and advantage of this system

    本文將光電子技術和光譜分析技術相結合，區別于已有電子舌系統中，利用化學反應實現液體檢測的研製思路，提出了一種利用光譜分析技術的電子舌研製思想，研製了基於集成led和光電二極體陣列的雙光路凹型光耦合電子舌系統，所研製的系統具有小體積、低功耗、低成本的特點。
  20. Based on silicon - piezoresistive method, the paper first gives the theory of array silicon piezoresistive pressure, acceleration sensor, and the design of its incorporated chip, microstructure and out - circuit. several key techniques of making array silicon piezoresistive pressure, acceleration sensor such as 1c technic, mems ( silicon - silicon direct bonding, anodic bonding, anisotropic etching ) is also studied. minuteness engine machining, anode bonding etc. in the paper there are three ways which are examine - form, curve simulanting, to carry out sensors non - linear self - emendating ; adopt the several curves approaching and curve simulating to achieve the aims of sensor error self compensation, fusion technology etc. therefore, it providing referenced values of ways and directions for sensor system directing on

    論文首先以硅壓阻效應原理為基礎，討論了陣列式硅壓力、加速度傳感器的設計原理，並對陣列式硅壓力、加速度傳感器中集成敏感晶元（壓力、加速度） 、總體結構和壓力陣列的信號處理電路進行了設計，在陣列式硅壓力、加速度傳感器的研製中，還研究了半導體平面工藝、大規模集成電路技術、微機械加工技術（硅硅鍵合、靜電封接、各向異性腐蝕）等關鍵技術的應用。
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