電路參數提取 的英文怎麼說

中文拼音 [diànlùshēnshǔdīqǔ]
電路參數提取 英文
circuit parameter extraction
  • 電 : Ⅰ名詞1 （有電荷存在和電荷變化的現象） electricity 2 （電報） telegram; cable Ⅱ動詞1 （觸電） give...
  • 路 : 1 （道路） road; way; path 2 （路程） journey; distance 3 （途徑; 門路） way; means 4 （條理） se...
  • 參 : 參構詞成分。
  • 數 : 數副詞（屢次） frequently; repeatedly
  • 提 : 提動詞（垂手拿著） carry （in one's hand with the arm down）
  • 取 : Ⅰ動詞1 （拿到身邊） take; get; fetch 2 （得到; 招致） aim at; seek 3 （採取; 選取） adopt; assume...
  • 電路 : [訊] circuit （ckt）; electric circuit; electrocircuit電路板 circuit board; 電路保持 guard of a c...
  • 提取 : 1. （取出） draw; pick up; collect 2. （提煉） extract; abstract; recover
  1. Parameters extraction for hemt small signal equivalent circuit

    小信號等效電路參數提取
  2. A united stimulation acquisition algorithm was designed for detecting the faulty circuits under automatic test equipment in order to decrease the test cost

    設計了適合自動測試系統進行模擬電路參數故障檢測的聯合激勵方式提取演算法以降低測試成本。
  3. An analytical mosfet threshold voltage shift model due to radiation in the low - dose range has been developed for circuit simulations. experimental data in the literature shows that the model predictions are in good agreement. it is simple in functional form and hence computationally efficient. it can be used as a basic circuit simulation tool for analysing mosfet exposed to a nuclear environment up to about 1mrad. in accordance with common believe, radiation induced absolute change of threshold voltage was found to be larger in irradiated pmos devices. however, if the radiation sensitivity is defined in the way we did it, the results indicated nmos rather than pmos devices are more sensitive, especially at low doses. this is important from the standpoint of their possible application in dosimetry

    該模型物理意義明確，參數提取方便，適合於低輻照總劑量條件下的mos器件與電路的模擬。並進一步討論了mosfet的輻照敏感性。結果表明，盡管pmos較之nmos因輻照引起的閾值電壓漂移的絕對量更大，但從mosfet閾值電壓漂移量的擺幅這一角度來看，在低劑量輻照條件下nmos較之pmos顯得對輻照更為敏感。
  4. We analyzed the dependence of equivalent circuit parameters of mesfet switch on material and device structure. for modeling, we designed and fabricated six set of mesfet switches with different gate width, then measured their performance and extracted switch model parameters. mesfet switch database corresponding to the mmic product line is then established, and using the dependence of switch model parameters on gate peripheral we can attain the mesfet switch performance with any gate width through parameters scaling

    移相器電路採用gaasmesfet開關作為控制元件，研究了mesfet開關等效電路參數與材料和器件結構參數的關系，設計製作了不同柵寬的六組mesfet開關，並進行參數測試和模型參數提取，建立了相應于mmic工藝線的mesfet開關模型庫；根據開關模型參數隨柵寬的變化規律，可以實現任意柵寬mesfet開關的參數定標工作。
  5. Assisted with the sensitivity of the linear analog circuits, the feasibility of parametric faults detection was analyzed through the maximum fault errors acquired at the sensitive frequencies, a stimulation matrix and its stimulation expression were put forward on the test points information

    摘要從線性模擬電路靈敏度的概念入手，分析了通過獲取敏感頻點激勵下的最大故障誤差來檢測電路參數故障的可能性，提出了一種針對測試頻率和測點信息的激勵矩陣。
  6. Abstract : the principle of electro - differential - constant temperature detector ( edctd ) is summarized. a calculation method for selecting resistance value in the measurement circuit based on the sensitivity requirement is proposed. theoretical analysis and experimental result for the method are also given. the proposed method can be applied to production and calibration of edctd, providing guideline in determining the resistance parameters

    文摘:介紹了電子差定溫式火災探測器的工作原理，提出了根據不同靈敏度要求選取電路中各電阻阻值的方法，並從理論和實驗兩方面加以分析和論證，消除了電阻參數選擇的盲目性，為生產、檢測差定溫式探測器提供了理論依據。
  7. Capacitance extraction for power grid of high speed integrated circuits

    高速集成電路電源網路的電容參數提取
  8. Electromagnetic modeling and parameter extraction play an important role in 1c design and it is a foundation of the works later

    因此，對互連和封裝結構進行電磁建模和參數提取，對于高速集成電路設計具有重要的意義，它是一系列后續工作的基礎。
  9. Two methods of analysis and design programs of filters are given. 3. some examples of filters are designed for special requirements, including combline, interdigital line and direct coupled

    2 .對抽頭線單元和內部耦合結構進行了詳細研究，給出了等效電路和參數提取兩種分析方法，並編寫了相應的設計程序。
  10. Design flow of analog circuit begins with drawing schematic and includes simulation, layout, drc / lvs check, parasitic extraction and post - simulation

    模擬電路從schematic開始，其設計流程包括：模擬，版圖繪制， drc lvs檢查，寄生參數提取和后模擬。
  11. A sub - circuit model for vdmos is built according to its physical structure. parameters and formulas describing the device are also derived from this model. comparing to former results, this model avoids too many technical parameters and simplify the sub - circuit efficiently. as a result of numeric computation, this simple model with clear physical conception demonstrates excellent agreements between measured and modeled response ( dc error within 5 %, ac error within 10 % ). such a model is now available for circuit simulation and parameter extraction

    從vdmos的物理結構出發建立子電路模型，進而導出描述其交直流特性的參數及模型公式.相對以往文獻的結果，該模型避免了過多工藝參數的引入，同時對子電路進行了有效的簡化.在參數提取軟體中的加載結果表明，該模型結構簡單，運算速度快，物理概念清晰，擬合曲線與測試數據符合精度高（直流誤差5以內，交流誤差10以內） ，適于在電路模擬及參數提取軟體中應用
  12. Abstract : a sub - circuit model for vdmos is built according to its physical structure. parameters and formulas describing the device are also derived from this model. comparing to former results, this model avoids too many technical parameters and simplify the sub - circuit efficiently. as a result of numeric computation, this simple model with clear physical conception demonstrates excellent agreements between measured and modeled response ( dc error within 5 %, ac error within 10 % ). such a model is now available for circuit simulation and parameter extraction

    文摘:從vdmos的物理結構出發建立子電路模型，進而導出描述其交直流特性的參數及模型公式.相對以往文獻的結果，該模型避免了過多工藝參數的引入，同時對子電路進行了有效的簡化.在參數提取軟體中的加載結果表明，該模型結構簡單，運算速度快，物理概念清晰，擬合曲線與測試數據符合精度高（直流誤差5以內，交流誤差10以內） ，適于在電路模擬及參數提取軟體中應用
  13. A tcad tool of doe design of experiment combining with simulations for ic optimization design was implemented on a pc, some simulation software such as suprem, minimos and pspice were utilized. the programs for fitting response surface, extracting spice model parameters and converting data files were completed. the application of doe on ic optimization design was studied using the tcad tool

    利用已有的工藝模擬軟體suprem器件模擬軟體minimos及電路模擬軟體pspice ，完成了響應表面擬合spice模型參數提取及數據轉換等程序，形成一個可以進行工藝器件及電路分析和優化設計的tcad工具，並用於研究實驗設計方法在ic優化設計中的應用。
  14. For the lossy multiple conductors configuration, which is essential unit of interconnects, its rapid and accuracy extraction are studied and achieved

    對集成電路中普遍存在的有耗多導體結構的高速高精度參數提取進行了研究與實現。
  15. This dissertation brings forward a new method of modeling and simulation on interconnect ? fem - vfm, which combines finite element method with vector fitting method. we can get the scatter / admittance / impedance ( s / y / z ) parameter by fem in frequence domain, gain the equivalent spice circuits of interconnect structure by vfm, and extract the circuit ’ s parameters which are used to analyze in time domain. this method lets the simulation not only contain the information of pcb ’ s structure but also have a sustainable computing speed

    首先通過電磁場數值分析方法?有限元法（ fem ）對互連結構進行模擬分析，而得到的散射/導納/阻抗矩陣參數（ s / y / z矩陣參數） ，然後通過矢量擬合方法（ vfm ）把s / y / z矩陣參數轉化為等效spice等效電路模型，並且提取出電路參數，完成了頻域到時域的轉換，最後使用電路模擬器進行時域模擬，從而開發出了一系列高速數字pcb板設計規則。
  16. The research results show that the proposed active power filter can compensate both the current harmonic current source and the harmonic voltage source. in addition, the determination method of the main parameters is deduced, which can provide the theoretical basis for the design and implementation of the prototype

    此外論文還推導出並聯型混合有源電力濾波器主電路參數的選取原則和方法，為后續有源電力濾波器的設計和實驗裝置的實現提供了理論依據。
  17. Two and three coplanar lines are studied as examples and their equivalent circuit parameters are obtained

    以雙線和三線結構為例，提取了其等效電路參數。
  18. The traditional methods of parasitic parameter extraction in eda, which based on the concept of lumped component, have lost their accuracy

    傳統的eda設計中的基於集總電路概念的參數提取演算法已經失去準確性。
  19. On the precondition that the error is acceptable, we reduce the memory circuit before we do the logic parameter extraction so as to realize extraction automation

    參數提取前，在庫參數精度受影響可忽略的前提下，對存儲器先進行電路簡化，使得存儲器的提取自動化得以實現。
  20. We choose hb qrc convert as the research object. this paper has completely analyzed the circuit work modes, designed an experimental device, analyzed the mam noise source, established the common - mode and different - mode noise current models, extracted the parasitic elements of four pcb layout and simulated each emi level. based on these, it has derived the element which have great effect on pcb emc and has designed the optimized pcb layout

    選擇一種半橋準諧振變換器作為研究對象，對其工作原理進行了詳細的分析，製作了實驗樣機，分析了它的主要干擾源，建立了它的共模、差模噪聲電流等效電路模型，對它的四種不同pcb布局進行了寄生參數提取和電磁兼容模擬，在此基礎上分析得到了影響其電磁噪聲水平的最重要因素，並設計出了最優的pcb布局。
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