電路級模擬 的英文怎麼說
中文拼音 [diànlùjímónǐ]
電路級模擬
英文
analog level simulation- 電 : Ⅰ名詞1 (有電荷存在和電荷變化的現象) electricity 2 (電報) telegram; cable Ⅱ動詞1 (觸電) give...
- 路 : 1 (道路) road; way; path 2 (路程) journey; distance 3 (途徑; 門路) way; means 4 (條理) se...
- 級 : Ⅰ名詞1 (等級) level; rank; grade 2 (年級) any of the yearly divisions of a school course; gra...
- 模 : 模名詞1. (模子) mould; pattern; matrix 2. (姓氏) a surname
- 擬 : 動詞1. (設計; 起草) draw up; draft 2. (打算; 想要) intend; plan 3. (模仿) imitate
- 電路 : [訊] circuit (ckt); electric circuit; electrocircuit電路板 circuit board; 電路保持 guard of a c...
- 模擬 : imitate; simulate; analog; analogy; imitation; simulation模擬艙 boilerplate; 模擬電路 [電學] circ...
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The three - order modulator has a 2 - 1 cascaded structure and 1 - bit quantizer at the end of each stage, the modulator is implemented with fully differential switched - capacitor circuits. and then, the discussion will begin by exploring the design of various circuit blocks in the modulator in more detail, i. e., ota, switched - capacitor integrator, quantizer, two - phase non - overlapping clock signal, etc., at the same time, these circuits will be simulated in spectre and hspice. at last, the whole cascaded modulator will do behavioral level simulation by matlab soft and simulink toolbox
本論文中,首先介紹模數轉換器的各種參數的意義,以及一階sigma - delta調制器和高階sigma - delta調制器的原理;給出解決高階單環sigma - delta調制器不穩定性的方案,引入級聯結構調制器,特別針對級聯結構調制器中的失配和開關電容積分器的非理想特性進行詳細的討論;本設計的sigma - delta調制器採用2 - 1級聯結構和一位量化器,調制器採用全差分開關電容電路實現;同時對整個調制器的各個模塊進行了電路設計,包括跨導放大器、開關電容積分器、量化器、兩相非交疊時鐘等,並利用hspice和spectre模擬工具對這些電路進行模擬測試;最後,利用matlab軟體和simulink工具對整個級聯調制器進行行為級模擬。In this project, the kernel chip is xc2vp4, which is a platform fpga manufac - tured by xilinx co. ise7. 1i foundation which is the latest and integrated eda devel - oping tool is used in the software developing. modelsim se6. 0 and ise simulator are the simulation tools. synplify pro8. 1 and xst are the synthesis tools
本課題硬體採用xilinx公司xc2vp4平臺級fpga為核心控制晶元,軟體採用xilinx公司最新集成化eda開發工具ise7 . 1ifoundation ,模擬工具modelsimse6 . 0 ,綜合工具synplifypro8 . 1等設計完成,高速電路採用lvds信號進行連接。Also, the principle of cas module of the reliability simulator bert 2. 0 is given and a 11 stage ring oscillator is used as an example for bert to predict the lifetime of devices and circuits
概述了電路可靠性模擬軟體bertz刀的cas ( circuitagingsanulator )模塊的基本原理:並以十一級環振為例,運用rh刀進行了其中各個器件和總的電路壽命的預測。The circuit is used in high resolution resistance measuring. the coupled chaotic circuit array composed of this circuit is researched by computer simulation and circuit experiment. results show that, it is feasible to improve the stability of orders of chaotic systems and reduce noise in measuring by coupling
最後,對以這種單電源驅動的混沌電路為基本單元所構成的耦合混沌陣列在提高系統輸出的穩定性和抑制噪聲作用方面,進行了計算機模擬研究和實際的電路實驗研究,結果顯示通過耦合的方式,可以將信號檢測的精度提高近一個數量級。The results of simulation prove that the improved algorithms are feasible for evolving the digital combinational logic circuits and improve the evolvable efficiency and convergence performance
模擬實驗結果證明了改進演化演算法對于實現函數級數字組合邏輯電路的硬體演化是可行的,並且提高了演化演算法的演化效率和收斂性能。The company is located at zhejiang ningbo technology park and it engages mainly in the smelting equipment of magnesium and aluminum allo y, quantitative conveying ana pouring equipment, gas protection device and the magnesium alloy pressure casting parts. the more, it can provide services of technology development, achievements transferring, process revamping, material inspection, computer stimulation, etc. the company is based on the strong technical strength of the military technology and the research institutes and has a large number of senior research personnel. the company owns many patents and know - hows, among which the magnesium alloy smelting, gas protection, quantitative pouringas well as the later on processing technology has reached the world advanced levet. the company sticks to aim of quality first, credit supreme and would like to provide best
公司位於浙江省寧波市科技園區凌雲路199號,是以生產鎂合金鑄件為主業,包括壓鑄低壓鑄造等,並具備技術開發成果轉化等功能的綜合性科技公司,以兵器工業和科研院所的雄厚實力為依託,擁有自主知識產權的多項專利專有技術和國際一流的技術裝備,擁有教授博士碩士等高級專業研究人員數名在鎂合金鑄造產品研製及后續加工方面,我公司擁有技術領先優勢,目前我公司為電動工具汽車摩托車零部件it行業以及軍工方面提供配套產品配套設備技術咨詢與技術服務技術轉讓及聯合開發,還可以進行工藝改造材料檢測檢驗計算機模擬等多項服務How the key device in the circuit affects the whole performance is analyzed in experiment. during the design, high frequency simulation tools, such as advanced design system ( ads ) 2004a of agilent corporation and serenade v8. 7 of ansoft corporation,
設計中分別採用了agilent公司的高級設計系統advanceddesignsystem2004a ( ads )和ansoft公司高頻模擬設計軟體serenadev8 . 7對振蕩器電路進行模擬和調試。Main course : structure of network of structure of all of technology of principle of analysis of logic of technology of electron of circuit principle, imitate, number, number, computer, microcomputer, computer science department, computer, advanced language, assembly language, data, operating system
主要課程:電路原理、模擬電子技術、數字邏輯、數字分析、計算機原理、微型計算機技術、計算機系統結構、計算機網路、高級語言、匯編語言、數據結構、操作系統等。Design and simulate of the single stage common emitter amplifier
單級阻容耦合晶體管放大器電路設計與模擬This thesis focuses on the ingress process module of ctu, which translates c - 5 dcp format to rainier 4gs3. the specification analysis, architecture and logic design, functional simulation testbench design, synthesis report and testing result are discussed in this thesis. the research work mainly includes : the specification analysis and design requirements of ctu logic ; the architecture and logical design of ingress process module, which includes receive control fsm, send control fsm and cell position adjustment logic ; the performance improvement of ingress process module to receive and transmit data cell at the full line speed
本論文的主要研究工作包括:通信協議轉換邏輯的功能分析和設計需求;通信協議轉換邏輯上行方向的系統分析及體系結構設計,包括上行接收狀態機、發送狀態機、信元內位元組位置調整機制等的設計;通信協議轉換邏輯上行方向的線速設計,主要是上行接收的線速設計,要使用流水設計技術;提出了高速實現roundrobin調度策略的實現方法,並設計實現了桶式移位器和優先級編碼電路;應用bfm模擬模型設計了上行處理各模塊的模擬testbench ,完成了各級模塊的模塊模擬和系統集成模擬。B. forward analog signals regulate circuit
2前級模擬信號調理電路。Based on many other circuit formats, a new kind of logic - level circuit representation, called unified middle - level circuit format ( umcf ), is defined in this paper, in which some special operations on circuit related with power estimation and low power design. umcf can not only interchange circuits of different formats, but also convert circuits to hspice acceptable files, which can be used for transistor level power estimation
本文結合多種不同的電路格式,自主定義了一種邏輯級電路的中間表示形式(稱為umcf )和一系列極具特色的與低功耗技術相關的操作,它不但可以實現與其他多種電路格式之間的相互轉換,還可以將電路直接轉換成hspice可以接受的文件,進行晶體管級的電路功耗估計,這樣可以在公認的高精度的功耗模擬器上,對本文的結果進行有效的驗證。This dissertation only considers the signal ’ s distortion by interconnect, such as delay, reflection, discontinuity of microstrip, crosstalk and simultaneous switching noise, and so on. nowadays, there are some simulation software in pcb level, but they are lack of the well ability of modeling. in order to simulate the interconnect accurately, we have to make use of three - dimension full wave analysis method, whose disadvantage is low speed in computing, but is competent for developing rules in high - speed designs
目前也有一些針對這些噪聲的高速pcb板級模擬軟體,但它們都缺乏詳盡的建模能力,特別是當頻率逐漸提高和電路板日益復雜后,更是顯得無能為力,要精確地對互連結構進行分析,三維全波模擬器似乎不可缺少,其缺點就是速度慢,對整板模擬很難實現,但非常適用於規則開發,而這正好是本文除了建模與模擬方法研究外另一個重點。According to the request of this subject, we have developed the system hardware and software for the slave device and the inspection software running on the pc. in this paper all of the followings is illustrated detailedly, such as the research on the principles of measurement and its realization, three means of water - level measurement that are separately based on photo electricity coder, pressure sensor and potentiometer ; selection of the microchip, we choose an advanced integrated soc ( system on chip ) microchip c8051f021 as the main controller ; realization of signal sampling, processing and its conversion in the mcu ; application of high precision 16 bits adc cmos chip - - ad7705 in our system, designing its interface with the microchip and relevant program ; using a trickle charge timekeeping chip ds1302 in the system which can provide time norm and designing of its i / o interface and program ; additionally, a 4 ~ 20ma current output channel to provide system check - up using ad421. in the system, ad421, ad7705 and the microchip compose spi bus ; to communicate with the master pc, here we use two ways which are separately rs232 and rs485 ; moreover, there are alarm unit, keyboard unit, power supply inspection unit and voltage norm providing unit in the system
針對研製任務的要求,課題期間研製了下位機系統硬體和軟體,開發了上位機監控軟體,其中所作的具體工作包括:測量原理的研究和在系統中的實現,在本次設計中用三種方法來進行水位測量,分別是旋轉編碼器法、液位壓力傳感器法和可變電阻器法;主控晶元的選擇,我們選用了高集成度的混合信號系統級晶元c8051f021 ;實現了信號的採集和處理,包括信號的轉換和在單片機內的運算;高集成度16位模數轉換晶元ad7705在系統中的應用,我們完成了它與單片機的介面設計及程序編制任務;精確時鐘晶元ds1302在系統中的應用,在此,我們實現了用單片機的i o口與ds1302的連接和在軟體中對時序的模擬,該晶元的應用給整臺儀器提供了時間基準,方便了儀器的使用;另外,針對研製任務的要求,還給系統加上了一路4 20ma模擬信號電流環的輸出電路來提供系統監測,該部分的實現是通過採用ad421晶元來完成的,本設計中完成了ad421與單片機的spi介面任務,協調了它與ad7705晶元和單片機共同構成的spi總線系統的關系,並完成了程序設計;與上位機的通信介面設計,該部分通過兩種方法實現: rs232通信方式和rs485通信方式;系統設計方面還包括報警電路設計、操作鍵盤設計、電源監控電路設計、電壓基準電路的設計。Mainly process pre - simulation and post - simulation on board level. it also analyses the result of simulation by tight the layout rules to signal lines
主要進行了板級的前模擬和后模擬。並採用約束規則驅動布線的方法進行了電路的板級模擬分析。System functions of gsmb based on " godson " cpu was programmed by the discussion of " godson " cpu micro - system structure finalization and by the introduction of " godson " cpu performance requirements. this essay also specified on gsmb board level system structure, bios level solving and selection of important chips. moreover, problems related to high speed circuit design such as mensurability, pcb layout signal integrity, electromagnetic coexist were researched
通過對「龍芯1號」 ( godson ) cpu微體系結構定型的討論和關于「龍芯1號」 cpu所需達到的的性能指標的介紹,規劃了基於「龍芯1號」 cpu的高速服務器主板gsmb的系統功能,並敘述了根據系統功能所設計的gsmb板級系統結構、 bios級解決方案和重要晶元的選型;另外還研究了高速電路設計所涉及的如可測試性、信號完整性、電磁兼容性等一系列問題,並依據研究構建了基於ibis的軟體模擬模型,同時藉助eda模擬分析工具對關鍵線網與關鍵模塊進行了板級模擬。In this part, the function definition and structure partition are finished, then every part is depicted with verilog hdl. by verilog - xl tools, behavior simulation is achieved. the chip logic function that is encrypting 1024bit data is realized
在設計的過程中,完成了整體的結構劃分,使用veriloghdl硬體描述語言進行了電路的rtl級描述,並利用了candence公司的verilog - xl完成了軟體平臺上的行為級模擬,實現了1024位數據的加密解密的邏輯功能。For examp1e, the sort arithmetic so1ves 1eve1 partition of combination 1ogic ; the computing input waveform of sensitized path makes the possib1e of conf1rm the minimum c1ock circ1e ; the cyc1e - - based method for synchronous op tajg1fyjct7 : @ + $ { 4it x sequentia1 circuits improve the speed of waveform simu1at ion
其中,編排級數法確定了組合邏輯的層次關系;通路敏化輸入波形方法決定了最小時鐘周期;基於周期的同步時序電路的模擬演算法加快了模擬的速度等。B. front stage analog signal processing circuit. c
2前級模擬信號放大與調理電路的介紹。The study of software simulation technology has been commenced long before. the system simulation includes two modes based on the circuit simulation and behavioral description simulation. event - driven is a commonly used simulation mode
軟體模擬技術的研究早已開始,系統模擬包括基於電路級和基於行為描述兩種模擬方式,事件驅動是最常用的模擬方法。分享友人