電阻性負載 的英文怎麼說

中文拼音 [diànxìngzǎi]
電阻性負載 英文
nonreactive load
  • : Ⅰ名詞1 (有電荷存在和電荷變化的現象) electricity 2 (電報) telegram; cable Ⅱ動詞1 (觸電) give...
  • : 動詞(阻擋; 阻礙) block; hinder; impede; obstruct
  • : Ⅰ名詞1 (性格) nature; character; disposition 2 (性能; 性質) property; quality 3 (性別) sex ...
  • : Ⅰ名詞1 (負擔) burden; load 2 (虧損) loss 3 (失敗) defeat Ⅱ動詞1 [書面語] (背) carry on th...
  • : 載Ⅰ名詞(年) year : 一年半載 six to twelve months; six months to a year; 三年五載 three to five ...
  • 電阻 : (物質阻礙電流通過的性質) resistance; electric resistance (電路中兩點間在一定壓力下決定電流強度...
  • 負載 : [電學] load
  1. It looks upon water resistant as load, simulate every instance of locomotive running and check its every parameter automatically, then collect and dispose these data of parameters, calculate the power of simulating running of locomotive, which is based on the current, and voltage of host dynamotor. afterward, it can be judged from the working state of locomotive. through experiment and adjust each parameter, it can provide important warrant to the components of locomotive whether they can work normally and credibly

    即以水作為,模擬機車運行,對機車的主發動機的流、壓和柴油機的轉速等參數進行檢測,並對檢測結果進行處理,計算出模擬機車運行時的功率,並以此為依據,對機車的工作狀念進行判斷,通過水試驗,調整有關參數,使機車運行時能發揮所要求的功率和滿足規定的工作特
  2. The theories and design principles of each circuit of the spwm three - phase frequency inverter experiment unit are in detail introduced in this thesis. at the same time some experiment results are shown that include the output voltage and current waves when the load is in resistivity, inductivity or asynchronous motor

    文中詳細介紹了spwm三相變頻實驗單元所包含的各路環節的理論基礎及設計過程,並給出了調試結果,如、感和異步動機時,實驗單元輸出的壓和流波形。
  3. Energy consume, electric strength, insulation resistance, ground conductivity, leakage current, microwave leakage, power input, normal temperature, humidity treatment, glow wire, horizontal flame, vertical flame, tracking, ball pressure, rainproof, water splash, dustproof, salt fog, endurance, motor load test, cord flexing, cord pulling, pull & torque test, lamp replacement, construction check etc

    能耗、氣強度、絕緣、接地連續、泄漏流、微波泄漏、功率、溫升、濕熱試驗、灼熱絲、水平燃燒、垂直燃燒、漏起痕、球壓試驗、防雨淋、防濺水、粉塵、鹽霧、耐久(壽命)試驗、試驗、源線彎折、源線提拉、拉扭力測試、燈頭互換、安全結構檢查等。
  4. 1 m 0. 5, the phase - shifted angle 6 is controlled in term of sine law which makes the magnitude of resonant voltage track a reference sine voltage, and the resonant voltage is rectified, filtered, inverted and then the better sine - voltage output is obtained, theoretical analysis and experimental results show that for the resistive load and inductive load, the switches of leading leg of the phase - shift - controlled circuit are always turned on at zvs, and ones of lagging leg are turned on at zvs ( < 0 ) or turned off at zcs ( ( > 0 ), moreover, all switches in the low - frequency inverter are always turned on and off at zvs, the measured circuit efficiency for rated load reaches up to 88 %

    從功率單向流動角度出發,提出了一種lcc諧振型恆頻移相單相高頻鏈逆變路拓撲,在調制系數0 . 1 m 0 . 5情況下,控制移相角按正弦規律變化,使諧振壓脈沖列的幅值追蹤參考正弦壓信號,經過整流、濾波、低頻逆變,從而獲得正弦度較好的輸出壓。理論分析和實驗結果證明對于,移相全橋具有超前橋臂零壓開通,滯后橋臂或者零壓開通( _ 0 )或者零流關斷( _ 0 )的軟開關特,而低頻逆變器的各個開關均實現零壓條件下的開通與關斷。
  5. Great intermittent noise, wide variety of impendence along with the load and great attenuation of signals have restricted the further utilization of power line

    但是,力線通信通道存在間歇噪聲大、抗隨變化大、信號衰減大等缺點,嚴重製約了它的有效利用。
  6. The system parameters are developed at the same time, and some universal conclusions on the theoretical analysis of pll are reached. then, we have carried on analysis and research to the theory of differential delay ring voltage controlled oscillator ( vco ). on this basis, a improved differential delay ring vco with more efficient loads is described. this circuit has been designed and implemented in 0. 35 m cmos technology

    本文還對差分延遲結構環形壓控振蕩器路進行了深入的分析與研究,並提出了一種基於高質量路的主從差分延遲結構環形壓控振蕩器,其採用了一種新型的主從差分延遲結構,並用一個更有效、更穩定的路結構來替代vco設計常使用的單個mos管結構,使其系統穩定有了相應提高。
  7. Combined with researches on propagation characteristics, the micro - current sensor for on - line pd monitoring is developed and the effects of coil number, stray capacitance and loading resistance on pass - band and sensitivity are also studied

    同時,結合傳播特,研究了局部放在線監測寬帶微流傳感器,並就線圈匝數、雜散容和等對傳感器通頻帶、靈敏度等能參數的影響進行了分析。
  8. To explain this, we ' re going to avoid the idea of impedance ( which has resistive, capacitive and inductive components, some of which vary in effect by frequency, thus varying the actual loading ) and use pure resistance to describe the concept

    為了便於解釋,我們準備暫時避免使用抗這一概念,因為它有成分,而其中一部分會隨著頻率的變化而變化,從而改變了實際的
  9. If line length is half wave at a certain frequency and both the load resistance rt and source resistance rs are higher than the characteristic impedance zo, then both the voltages at input and at load are maximum at that frequency and both the voltages at input and at load are minimum at half of that frequency

    均高於傳輸線特抗情況下,當線長為某頻率波長之半波,則輸入端與壓在該頻率均為最高,在該頻率之半時則壓均為最低。
  10. Input capacity of time relay contact : 220v 30a

    輸出繼器觸點容量: 220v 30a
  11. Five different structures are described : standard transformer coupling, parafeed, resistively loaded stage capacitively coupled to the output transformer, tube ( valve ) based constant current source load capacitively coupled to the output transformer, and solid state ( mos fet ) constant current source load capacitively coupled to the output transformer

    我們將討論五種不同的方式:標準變壓器耦合;旁饋耦合;電阻性負載耦合至輸出變壓器;膽恆流源耦合至輸出變壓器;以及晶體管恆流源耦合至輸出變壓器。
  12. The thesis has done the widespread investigation and study to the domestic and foreign ’ s technologies of analogy low voltage and low power, and analyzes the principles of work, merts and shortcomings of these technologies, based on the absorption of these technologies, it designs a 1. 5v low power rail - to - rail cmos operational amplifier. when designing input stage, in order to enable the input common mode voltage range to achieve rail - to - rail, it does not use the traditional differential input pair, but use the nmos tube and the pmos tube parallel supplementary differential input pair to the structure, and uses the proportional current mirror technology to realize the constant transconductance of input stage. in the middle gain stage design, the current mirror load does not use the traditional standard cascode structure, but uses the low voltage, wide - swing casecode structure which is suitable to work in low voltage. when designing output stage, in order to enhance the efficiency, it uses the push - pull common source stage amplifier as the output stage, the output voltage swing basically reached rail - to - rail. the thesis changes the design of the traditional normal source based on the operational amplifier, uses the differential amplifier with current mirror load to design a normal current source. the normal current source provides the stable bias current and the bias voltage to the operational amplifier, so the stability of operational amplifier is guaranteed. the thesis uses the miller compensate technology with a adjusting zero resistance to compensate the operational amplifier

    本論文對國內外的模擬低壓低功耗技術做了廣泛的調查研究,分析了這些技術的工作原理和優缺點,在吸收這些技術成果基礎上設計了一個1 . 5v低功耗軌至軌cmos運算放大器。在設計輸入級時,為了使輸入共模壓范圍達到軌至軌,不是採用傳統的差動輸入結構,而是採用了nmos管和pmos管並聯的互補差動輸入對結構,並採用成比例的流鏡技術實現了輸入級跨導的恆定;在中間增益級設計中,流鏡並不是採用傳統的標準共源共柵結構,而是採用了適合在低壓工作的低壓寬擺幅共源共柵結構;在輸出級設計時,為了提高效率,採用了推挽共源級放大器作為輸出級,輸出壓擺幅基本上達到了軌至軌;本論文改變傳統基準源基於運放的設計,採用了帶流鏡的差分放大器設計了一個基準流源,給運放提供穩定的偏置流和偏置壓,保證了運放的穩定;並採用了帶調零的密勒補償技術對運放進行頻率補償。
  13. The experiment result shows that conversion efficiency in ccm is improved by 2 percent compared with that in dcm, although the on - resistance of winding in ccm is more than that in dcm. the analysis of open - loop transfer function in both dcm and ccm shows that pull - push hfl inverter at ccm

    微分補償網路的推挽高頻鏈逆變路在輸出從空變化到額定變化的過程中,逆變路工作模式從dcm變化到ccm模式,實驗結果表明路在這兩種模式下都能輸出穩定的正弦壓,且具有較高的穩態精度。
  14. Different distribution of power loss can be worked out by mathcad software based on the formula reasoning. the result of calculation is consistent with that of the experiment, which proves that this method is right. it is pointed out through the analysis of calculating data that the key to improve efficiency at the same output power is to decrease the peak current and rms current of power switches or the on - resistance of mosfet and windings

    由推導可得損耗計算公式,利用數學計算軟體計算出路輸出從空到410w時損耗分佈變化,該結果與實驗數據基本相吻合,證實了這種方法的正確;通過對計算數據的分析,指出了進一步提高效率的關鍵在於輸出相同功率時降低功率管的流峰值和有效值,減小繞組和mosfet的導通
  15. High amplitude trigger pulse meets the power requirements of many thyristors connected in parallels. the voltage peak emerged in switching off inductance circuit is amortized by resistor and capacitor absorbed circuit

    選取r = 54 , c = 0 . 22 f的容緩沖吸收路有效降低了快速晶閘管關斷感產生的過壓。
  16. As most of us are aware, speakers are not pure resistive loads

    大部分人都知道,揚聲器不是純粹的電阻性負載
  17. A deadbeat control algorithm based on resistive load as well as its realization scheme and experiment results are given. to overcome its shortcomings, a disturbance prediction based deadbeat control algorithm is presented

    在介紹無差拍控制原理、具體實現方法和實驗結果的基礎上,引入了流預測的方法。
  18. After the analysis of some structures commonly used in dielectric phase shifter, a new structure named distributed capacitor - loaded phase shifter was carried out. it is comprised of a high - impedance transmission line periodically loaded with bst ( baxsr1 - xtio3 ) thin film capacitors

    在對現有的幾種薄膜介質移相器結構進行分析的基礎上,提出了一種新型的分散式型薄膜介質移相器結構,它由高傳輸線和周期的鈦酸鍶鋇薄膜容構成。
  19. When the input voltage varies from 40v to 60v and the output side varies from no load to rated resistance load, the output voltage will vary within 1. 3 % with the thd of less than 2 % and the highest efficiency of 86. 3 %

    當輸入壓變化、輸出從空變化到額定時,輸出壓變化量小於1 . 3 ,正弦輸出壓波形失真度小於2 ,變換效率最高為86 . 3 ,額定時效率為84 . 4 。
  20. The second, the realization of the zvs has no concerned with the attribute of load. with the load of light or full, even the resistance or inductor load, the chopper can ensure that the main - switches will realize the zvs switching

    其次,實現零壓軟開關的條件與質和程度沒有關系,無論是電阻性負載還是大,無論是輕還是滿,都可以實現功率器件的零壓開通和關斷。
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