chip testing 中文意思是什麼

chip testing 解釋
晶元測試
  • chip : n 1 碎片,削片,薄片;碎屑;薄木片;無價值的東西。2 (陶器等的)缺損(處)。3 (賭博用)籌碼;〈p...
  • testing : 測試系統
  1. In software, we will realize testing and displaying in real time on windows operating system. in hardware, we use computer as postposition cpu, single chip micyoco ( scm ) as front cpu, and link them into distributing testing system , communication between postposition cpu and front cpu through usb interface

    軟體上,使用windows平臺實現實時性很高的實測實顯任務;硬體上,將計算機作為上位機,單片機作下位機,組成分散式測試系統,通過usb介面實現數據傳輸。
  2. The function of ppi ( programmable parallel interface chip ) 8255 is realized through emulating the key waves and testing a chip

    通過波形模擬、下載晶元的測試,完成了計算機可編程并行接晶元8255的功能。
  3. In this paper, we combine the standard modules realize the boundary scan of estarl and also expand it to the test of internal circuit. this structure can save the i / o port of the chip and simplify the testing program

    本文結合標準模塊設計實現了estar1的邊界掃描結構,並進行了擴展,應用到晶元內部測試,節約了測試i / o口消耗,簡化了測試過程。
  4. This paper first begin with the connotation of virtual instrument technology, study and discuss the criterion and the working theory of usb deeply. on the principle of usb1. 1criterion, using usb interface chip usbn9604 and low consumption mirochip c8051f231, we designed the available interface of usb bus and its controlling software, turn the communicating function based usb bus between computer and testing device. second based on the developed interface of usb bus, using microchip pic16c62 and a mount of relays, we designed the multiswitching scanner and its controlling software to complete the funtion of accesses swithing in testing system. third calling the api function inside the windows using vb programming language, communicat with the impelling program of selected hid, achieve the function of testing instrument with usb interface, complete the development of upside software faced testing. at last, based on the deep studying of pcb testing method, used the developed multiswithing scanner and software faced testing, combinated with necessary testing instrument, we constructed the pcb testing system and analized the testing result simply

    論文首先從虛擬儀器的技術內涵出發,深入研究和討論了通用串列總線usb規范及工作原理,並依據usb1 . 1規范,採用usb介面晶元usbn9604和低功耗微處理器c8051f231設計開發了通用的usb總線介面及其控制固件,實現了通用計算機與測試設備之間基於usb總線的通信功能;其次,在所開發的usb總線介面的基礎上,使用微處理器pic16c62和多路繼電器開關,設計開發出實現測試系統中測試通道切換功能的多路通道掃描器及其控制固件;再次,採用vb語言編程,調用windows內部api函數,與選定hid類驅動程序進行通信,實現usb總線介面測試儀器功能,完成面向測試的上層軟體開發;最後,在深入研究印刷電路板測試方法的基礎上,利用已開發的多路通道掃描器和面向測試軟體,結合必要測試儀器組建印刷電路板測試系統,並對測試結果進行了簡要的誤差分析。
  5. The processes include the deposition of the waveguide film, the design and fabrication of the mask pattern, the lithography, the metal coating with a magnetic sputtering, the lift - off process for the metal mask, the dry deep etching by icp, the slicing of the wafer, the polishing of the cutting edge, the fiber - to - waveguide alignment and at last, the performance testing. some edg chip samples are fabricated

    對設計好的集成波導器件,本論文設計並試驗了器件的製作的全部工藝,包括波導薄膜的沉積,掩模的設計製作,光刻,濺射金屬薄膜,剝離法製作金屬掩模,干法深刻蝕,矽片切割,端面磨拋,波導對準和性能測試。
  6. At present experiment on the test the pull and press intensity test to rubber is usually curried out on the stretch experiment machine. most of the testing systems for homemade stretch experiment machines are based on single chip and others are based on pc systems

    目前對橡膠產品進行拉壓強度檢測實驗一般是在拉伸試驗機上進行,國產拉伸試驗機大部分是以單片機為主的測試系統,也有部分拉伸試驗機是以pc機系統為核心的測試系統。
  7. This article describes a way of special ultrasonic system which monitors thermal stress in seamless welded rails. this monitoring system is a non destructive testing system, which adopts avr mcu and high - precise time chip processing as the core of it, and adopts the critically refracted longitudinal wave as the object of measuring. my studying focuses on the theory of the monitoring system, which will be listed in this arctile : according to the snell theory, the theory of motivating of critically refracted longitudinal wave is described in details, and the finite element software is used to emulate the propagating course. the formulas of calculating the pts of swr are taken from the acoustoelasticity theory, and the calculating the parameters is introduced. according to assemble materials, three kinds of ways of monitoring the pts of swr using critically refracted longitudinal wave are described, which are measuring the sound - time in changeless distance, ultrasonic critical - angle refractomery and frequency spectrum, the first way of ways is used in this experiment system. the factors, which effect the monitoring system, are assaid in some degree based

    本文的研究工作重點在無縫焊接鋼軌溫度應力測量系統的理論模塊,包括根據snell原理,研究極限折射縱波的激發機理,並使用有限元軟體ansys進行模擬;根據聲彈性理論以及公式推導出計算無縫焊接鋼軌中的溫度應力的公式,並對其中參數的求解方法進行介紹;根據收集的資料,介紹了三種使用極限折射縱波測量無縫焊接鋼軌溫度應力的方法,即固定距離測量聲時法、臨界角折射法和頻譜分析法,本實驗系統使用的是第一種;根據實驗經驗以及相關資料,分析了影響極限折射縱波測量溫度應力的幾個因素,並提出了相應的解決方法;根據實驗系統的需要,獨立設計並加工出相關配套的實驗設備,包括實驗鋼塊、有機玻璃楔塊、固定件、載荷外框裝置等。
  8. In this paper, the circuit used for testing sheet resistance is designed using single chip processor. additionally, we have expressed van der pauw function as a polynomial form through local and global reversal development by using the normalized polynomial match, being convenient not only for programming, but also for sheet resistance testing when using van der pauw and rymaszewski methods

    本文還利用單片機系統設計了薄層電阻測試電路,對于程序中用到的范德堡隱函數,利用非線性反演和規范化擬合的方法推導出其多項式顯函數形式。這不僅給對我們編寫程序提供了方便,也為使用范德堡法和rymaszewski法測量薄層電阻提供了便利。
  9. Then a comparison is made according to their characters and the application scope of each method is determinate. from that we get the whole scheme of design for testability of dspc50, which is using boundary scan to improve the board - level testability of the chip and using full - scan in designing the nuclear circuit to reduce the difficulty of testing the chip

    在此基礎上得到dspc50的可測性設計的整體方案,即採用邊緣掃描設計提高晶元在板級的可測性,同時用全掃描思想設計晶元核心電路,以降低晶元本身測試的難度,即將晶元的全掃描設計包含入邊緣掃描系統。
  10. So in one hand it requires the wafer ' s diameter to be more large in order to enhance the productivity, and on the other hand it puts forward more strict requirement about the crystal perfection and electricity character. especially the electronic character and the equality of micro - area in the crystal wafer has become the key factor to determine whether the device can be made on it or not. so the resistivity measurement of micro - area become one most important procedure in the chip machining. to ensure the produce quality of chip and the perfect performance of final production, the four - probe testing technology need to be deeply studied

    圖形日益微細化,電路尺寸不斷縮小,目前ic製造以8英寸、 0 . 13 m為主,預計在2007年左右將以12英寸、 65nm為主,這一方面要求圓片直徑不斷增大以提高生產率,另一方面對晶體的完美性、機械及電特性也提出了更為嚴格的要求。特別是微區的電學特性及其均勻性已經成為決定將來器件性能優劣的關鍵因素。因此,微區電阻率的測試成為晶元加工之中的重要工序。
  11. A convenient and effective testing system for plastic eacapsulated microcircuit is designed. the testing results show that si3n4 passivation on test chip has the better protection than that without si3n4 passivation, and silicone gel coating can prevent moisture from the surface of the chip more effectively than polyimide coating, and molded plastic from varied manufacturers has the different effect on microcircuit due to its diversity

    貯存試驗的結果表明,在晶元上加氮化硅鈍化層比不加鈍化層具有更好的防護效果;與聚酰亞胺膠內塗層相比,硅酮膠內塗層更能有效地阻止水分到達晶元的表面;由於材料本身的差異,不同廠家生產的模塑封裝材料對微電路的影響也不同。
  12. The paper discusses the part of asic design of tcm ( trellis coded modulation ) in hdtv 8vsb terrestrial channel broadcasting receiver chip. in testing, the tcm can improve the signal - to - noise by 3. 3db compared with uncoded 4 - vsb modulation, and with the 12 path intrasegment interleaving in tcm coding and viterbi decoding, system can control short burst noise error efficiently

    在高清晰度電視通道接收晶元中內碼是8 ? vsb的格狀編碼,在系統性能上使用tcm編碼要比未編碼有3 . 3db的編碼增益,另外在格狀編碼中加入了12路的內交織,可有效的抑制短的突發噪聲對接收端viterbi解碼性能的影響。
  13. The basic principle of natural gamma - ray log is stated, the developing background, developing ways and developing situation of natural gamma - ray tools are introduced. the researching task of the paper is presented through analyzing the using situation and questions exsisted in inner natural gamma - ray tools, the researching work is started from three aspects, they are logging tool development, reliability design and reliability assuring methods, and the data processing methods, in the course of logging tool development, instrument indexes are presented based on the compatible property of sookbps telemetry system and environmental property, the analog measuring chanel and the interface circuit which realizing the compatible performance are designed according to the instrument mdexes. the detecto * design. the plateau property testing of the detector and the analysis of it ' s affecting factors are stated, the measuring property of the tool is discused, a new type of single chip microcomputer is selected when designing the interface circuit, and the laboratory experiments has fulfiled conmunieating standard signals between the interface circuit, the universal interface unit of sookbps telemetry system and also 500kbps telemetry system

    本文首先概要介紹了石油測井的基本概念、方法、條件、最新進展、以及應採取的研發對策,論述了自然伽瑪測井的基本原理,介紹了自然伽瑪測井儀的發展背景、發展歷程和發展現狀,通過分析國內自然伽瑪測井儀的使用情況和存在的問題,提出了本文的研究任務。研製工作從測井儀研製、可靠性設計與可靠性保障技術、數據處理方法研究三個方面展開,在測井儀研製過程中,根據500kbps遙傳系統要求的配接性能和使用環境特徵,提出了主要儀器指標,並根據這些指標,設計了儀器模擬測量通道和實現這一配接性能的介面電路;論述了探測器的設計、坪特性影響因素分析及其測試,探討了儀器的測量性能;在設計介面電路時選用了新型單片機晶元,並與500kbps遙傳通用介面單元rtu 、 500kbpa遙傳系統實現了室內配接。
  14. Combined with scientific research practices, by means of single chip microcomputer and computer simulation, on basis of the assembler and vc programming, this paper analyses and researches emphatically the basic principle of tank fire control system simulation, the data collection ( including testing ), 3d battlefield environment and the modeling of projectile ' s external trajectory etc

    結合科研實踐,運用單片機技術和計算機模擬技術,基於匯編和vc編程機制,著重對坦克火控系統系統模擬的基本原理、數據採集的實現(包括測試) 、三維戰場環境和彈丸外彈道模型的構建等方面進行分析研究。
  15. For the convenience of test, varied circuit chip defects caused by the production process are abstracted as all kinds of models. at present the commonly used fault models mainly consist of stuck - at fault, stuck - open fault, bridge fault, store fault, delay fault, etc. testing methods based on voltage testing mainly aim at stuck - at fault model and have also obtained satisfactory result in research for many years. bridge fault is tested easily by quiescent power supply current ( iddq ) testing method. in regard to stuck - open fault that is difficult to testd by quiescent power supply current ( iddq ) and voltage testing, it can is tested by the dynamic current ( iddt ) testing

    為了便於測試,我們將生產過程中集成電路出現的多種多樣的缺陷抽象為各種模型。目前常用的故障模型主要有:固定故障,開路故障,橋接故障,存儲故障,時滯故障等。電壓測試主要針對固定型故障模型,多年的研究也取得了令人滿意的結果; cmos電路中的橋接故障則宜用穩態電流測試方法( iddq )測試;對于電壓和穩態電流難以測試的開路故障,可以使用瞬態電流測試( iddt )的方法進行測試。
  16. Paints and varnishes - determination of stone - chip resistance of coatings - multi - impact testing

    色漆和清漆.塗層的耐石片劃性的測定.多沖擊試驗
  17. Testing method for determination of low molecular weight compounds content in chip and fibres of polycaproamide

    聚己內酰胺切片和纖維中低分子物含量的測定方法
  18. This paper points that the activity of chip ' s verification is no longer hardware testing, but a hardware testing with basic rules of software testing

    在文中,通過對驗證活動的作用、驗證流程的分析,提出晶元的驗證已經不僅僅是硬體測試,而且是結合有軟體測試特點的硬體測試。
  19. Bluetooth headset main chip testing f

    藍牙耳機主晶元測試架
  20. With the sharp development of lsi and vlsi, the integration of chip gets denser and denser. but the extra ports for testing is limited and test is more difficult than before. we even must spend more time and money on chip testing rather than chip design

    大規模集成和超大規模集成電路迅速發展,使晶元的集成度越來越高,而供外部測試的引腳卻很少,測試問題日趨困難,甚至使晶元測試比晶元本身的設計和生產要付出更高的代價。
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