circuit parameter extraction 中文意思是什麼

circuit parameter extraction 解釋
電路參數提取
  • circuit : n 1 （某一范圍的）周邊一圈；巡迴，周遊；巡迴路線[區域]；迂路。2 巡迴審判（區）；巡迴律師會。3 【...
  • parameter : n. 1. 【數學】參數，變數；參詞；參項。2. 【物理學】參量；（結晶體的）標軸。3. 〈廢語〉【天文學】通徑。vt. -ize 使參數化。
  • extraction : n. 1. 抽出，拔出。2. 【化學】提取（法）；萃取（法）；回收物，提出物；精煉。3. 精選，摘要。4. 血統，家世，出身。5. 【數學】開方，求根。
  1. The thesis discussed a parameter extraction program for the mosfet level1 model. in the analysis and design of circuit, at first, the thesis described the system function of the new dc - dc switching converter. then several sub - circuits of converter ic such as oscillator, over - temperature shutdown circuit, auto - restart counter circuit and control circuit were completely discussed

    在電路設計中，本文首先分析了開關電源電路的基本拓撲結構和psm調制模式，接著對開關電源變換器進行了系統的原理分析並設計了總體框圖，然後詳細設計了振蕩器電路，熱保護電路，自動重啟計數器電路和主控門邏輯等子電路並進行了功能模擬。
  2. With the software cadence, model establishment and parasitic parameter extraction are made on the main pcb lines of the proposed circuits. equivalent circuit models of common mode combined with differential mode current and noise simulation models are also established on full bridge switching - mode converters. study on the simulation of conducted interference noise is made with the software saber and the effects on the circuits " noise by the main parasitic parameters are also analyzed

    在對全橋開關型變換器電路工作原理分析的基礎上，建立了全橋開關型變換器主要元器件的電磁干擾參數模型，利用cadence軟體對其pcb主要印製導線進行了建模分析和寄生參數的提取，得到了全橋開關型變換器傳導干擾的共模、差模噪聲電流等效電路模型以及噪聲模擬模型，並運用saber軟體進行了傳導性干擾噪聲的模擬研究，分析了主要寄生參數對電路噪聲的影響。
  3. A sub - circuit model for vdmos is built according to its physical structure. parameters and formulas describing the device are also derived from this model. comparing to former results, this model avoids too many technical parameters and simplify the sub - circuit efficiently. as a result of numeric computation, this simple model with clear physical conception demonstrates excellent agreements between measured and modeled response ( dc error within 5 %, ac error within 10 % ). such a model is now available for circuit simulation and parameter extraction

    從vdmos的物理結構出發建立子電路模型，進而導出描述其交直流特性的參數及模型公式.相對以往文獻的結果，該模型避免了過多工藝參數的引入，同時對子電路進行了有效的簡化.在參數提取軟體中的加載結果表明，該模型結構簡單，運算速度快，物理概念清晰，擬合曲線與測試數據符合精度高（直流誤差5以內，交流誤差10以內） ，適于在電路模擬及參數提取軟體中應用
  4. Abstract : a sub - circuit model for vdmos is built according to its physical structure. parameters and formulas describing the device are also derived from this model. comparing to former results, this model avoids too many technical parameters and simplify the sub - circuit efficiently. as a result of numeric computation, this simple model with clear physical conception demonstrates excellent agreements between measured and modeled response ( dc error within 5 %, ac error within 10 % ). such a model is now available for circuit simulation and parameter extraction

    文摘:從vdmos的物理結構出發建立子電路模型，進而導出描述其交直流特性的參數及模型公式.相對以往文獻的結果，該模型避免了過多工藝參數的引入，同時對子電路進行了有效的簡化.在參數提取軟體中的加載結果表明，該模型結構簡單，運算速度快，物理概念清晰，擬合曲線與測試數據符合精度高（直流誤差5以內，交流誤差10以內） ，適于在電路模擬及參數提取軟體中應用
  5. We have developed a tool suite using c / c + + language on sun ultra60 workstation - ir drop 2003. it can be used to accomplish the analysis of power grid integrity with high speed. this tool suite consists of five components : tools for power grid parameter extraction, tools for enhanced circuit ' s partition, two steps reduction, the fast circuit solver and a plotter

    我們用c c + +語言在sunultra60工作站上實現了一套改進的快速電源網格完整性分析驗證集成工具包? ? irdrop2003 ，該工具包括五部分：電源網格提取工具，改進的劃分電路工具，兩重壓縮器，電路快速求解引擎和友好的圖形顯示界面。
  6. On the precondition that the error is acceptable, we reduce the memory circuit before we do the logic parameter extraction so as to realize extraction automation

    參數提取前，在庫參數精度受影響可忽略的前提下，對存儲器先進行電路簡化，使得存儲器的提取自動化得以實現。
分享友人
分享到 Line

分享到臉書