clock pulse gate 中文意思是什麼
clock pulse gate
解釋
同步脈沖開關-
Based on the construction of traditional flip - flop, we propose a novel edge - triggered flip - flip using one latch controlled by narrow pulse according to race - hazard of clock. then this principle is adopted in ternary circuit, a new ternary d type edge - triggered flip - fiop based on cmos transmission gate is proposed
在二值單閂鎖結構邊沿觸發器的基礎上,把利用時鐘信號競爭冒險的思想應用於三值電路中,提出了基於cmos傳輸門的二值d型時鐘信號競爭型邊沿觸發器。
分享友人