dsps 中文意思是什麼
dsps
解釋
深海採油系統-
The hardware has two input channels of high - speed analog signal, with the signal amplitude of 0 - 5v, the conversion precision of 12bits, and the maximum sampling rate of 400ksps. this system includes 4 dsps ( adsp 2181 ), which can be arranged as a pipe line processing array. many algorithms can be realized in this system
系統硬體有兩路模擬數據採集通道，模擬信號輸入范圍為0 ? 5v ，轉換精度為12位，最高采樣率400ksps ；系統包含4片dsp （ adsp2181 ）構成的流水線型的處理陣列，可用於實現各種演算法；系統的控制邏輯由fpga完成。 -
In order to make the doas estimation faster, this paper discuss how to used multiple dsps to parallel implement the algorithm
採用music演算法，需要對復矩陣進行特徵分解，本文使用兩種方法: jacobi法和householder 、 qr方法。 -
Dsps is used to accurately detect the moving area of multi - moving objects and information of their geometrical position in the system, at the same time, it pick up the parameters of geometrical feature, gray feature and planar velocity of each area, at last, we integrate the techniques of multi - moving objects detection and construct a self - adapted system to track multi - moving objects. the camera is controlled to keep the object in its field of view. therefore we achieve a real time system to track the multi - moving objects in the complex scenes
本系統利用dsps精確檢測出多運動目標的運動區域及其幾何位置信息，並對各個運動區域進行幾何特徵參數、灰度特徵參數和運動速度參數的提取，最後根據這些特徵參數值結合多目標運動狀態檢測技術構建了多運動目標自適應跟蹤系統，並根據已經計算出的運動目標的速度矢量，通過雲臺裝置控制攝像頭的轉動，使得特定運動目標始終位於攝像機的視野中，從而完成對復雜背景中多個運動目標中特定目標的實時跟蹤。 -
Different from general microprocessors, dsps have harvard architecture or enhanced harvard architecture and units of dsps can work in parallel. to perform multiplication in high speed, dsps also include hardware multiplier in its cpu
與通用微處理器不同，數字信號處理器採用了哈佛總線結構或改進哈佛總線結構，具有高度的并行性，為了快速完成乘法計算在cpu中增設了硬體乘法單元。 -
The dsps chip used here is the tms320f240 from ti. 3. the process of the software designing for the control system
在船舶減搖水艙試驗臺架控制系統中選取的dsp晶元是ti的tms320f240 。 -
Chapter 4 explores the multi - level pipeline - controlled parallel mechanism and parallel performance of multi - sharc system. then the parallel data block - processing scheme for distributed multi - dsp ring network system is introduced in view of dsps " macro pipelines and operating pipelines
提出了在考慮到操作流水線和宏流水線的影響下，數據塊并行處理策略在基於環網結構的分散式多sharc系統中的新應用。 -
Design and realization of high voltage svc controller based on dual dsps
的高壓無功補償裝置設計與實現 -
Its base - band module is mainly made up of four dsps : signaling, submitting, receiving and testing
綜測儀由信令模塊，發射模塊，接收模塊和測量模塊組成。 -
An analysis of 35 notifiable communicable diseases of national dsps in june
2002年6月份全國疾病監測點35種法定傳染病疫情動態分析 -
An analysis of 35 notifiable communicable diseases of national dsps in january
2002年1月份全國疾病監測點35種法定傳染病疫情動態分析 -
Higher - speed dsps extend possibilities to design more reliable, functional and compact radar signal processing systems. this thesis presents a high - speed dsp system based on tms320c6701 dsp to real - time implement azimuth compression
本論文結合電子所機載合成孔徑雷達實時數字成像處理器工程項目，設計開發了採用tic67dsp作為核心處理部件進行方位處理的高速信號處理系統。 -
The integral structure of system are analyzed, and a scheme based on dsps processing board + mcu control board are put forward firstly, following design difficulties and relevant measures. every modules of dsps board are described in details, including chips selection, implementation manners choice, interface and time sequence match and etc. compared otsu single threshold segmentation with multi - threshold segmentations, the latter are preferred to perform the object identification in hardware designed by author. combined to like background rejection, morphology expansion and etc. steps, the paper gets the length of queue ; finally, a - b united control and area united control based on can bus are designed
首先分析了系統的總體結構，提出了一種基於dsps處理板+單片機控制板的信號機實現方案；在此基礎上，重點介紹了處理板模塊化的硬體電路設計，其中考慮了晶元的選型、實現方式的選擇、工作機制、時序匹配等問題；之後，分析了otsu單閾值目標識別和多閾值目標識別的效果，重點選擇後者在硬體電路板內對圖像進行了目標識別的演算法處理，結合背景的剔除、形態學膨脹等幾個減小誤差的措施，對車輛排隊長度進行了較為精確的提取；最後在控制板上完成了干線a - b信號聯動控制和基於can總線的區域聯網控制的通訊方案設計。 -
It is convenient to implement speech coder and decoder on a single dsps chip
在單片dsp處理器上實現語音信號編解碼是十分便利的。 -
Microcontrollers mcus and digital signal processors dsps are here to stay, and are becoming more pervasive in industrial, communications, automobile, and consumer products
微控制器mcu和數字信號處理器dsp在工業通信汽車和消費類產品中得到越廣泛的應用 -
This thesis is mainly concerned with how to apply to monitoring online and fault diagnosis with the transducer technology, signal receiving and processing technology, artificial neural network and bp arithmetic, fault diagnosis technology, structure dynamics, matlab software, supersap software, dsps system. when the structure is excited, the monitoring system can automatically pick up signals, gain feature parameters. the well - trained bp artificial neural network, can determine whether the structure has fault when the parameter is input into it
本文主要研究如何運用傳感器技術、信號提取和信號處理技術、人工神經網路及bp演算法、故障診斷和結構動力學知識、 matlab軟體、 supersap軟體、 dsps系統，對結構進行在線監測，當結構受激勵時，監測系統就會自動採集信號，獲得特徵參數，將特徵參數輸出訓練好的bp人工神經網路，就可以診斷結構是否有故障。 -
The system completes anti - jamming function of frequency - hopping ( fh ) and direct sequence spread spectrum ( ds - ss ) by exploiting dsps + fpga structure, so it is flexible and modular
它採用dsps + fpga的結構，實現跳頻擴頻和直接序列擴頻的抗干擾功能，因而結構靈活，適于模塊化設計。 -
The paper is completed research of measurement and control system based on dsp under technology. the paper is designed a card with the data - collection conversion and control by adopting mainly tms320f240 among the dsps as kernel processor, with peripheric a / d and d / a circuit epm7128 ' s decode and latch circuit and isa interface circuit
本論文主要是採用數字信號處理器dsp中的tms320f240作為核心處理器，結合外部的模數轉換和數模轉換電路、可編程邏輯器件epm7128的地址譯碼和鎖存電路和isa介面電路，設計了集採集、轉換、控制於一身的isa卡。 -
For the high - speed digital signal processing, the structure of fpga and dsp is widespreadly adopted. dsp is more featured in the implementation of complicated algorithm, while field programming gate array ( fpga ) shows more advantage in its flexibility of design, simplicity of system configuration, modification and maintenance. in the paper, the hardware system of the spaceborne radar is based on the structure of fpga and dsp, of which the signal processing part is accomplished with one fpga chip and multi dsps
Dsp適合完成結構復雜的演算法;現場可編程邏輯陣列（ fpga ）適合完成高效、演算法固定的任務;與專用集成電路（ asic ）相比， fpga優點主要在於其很強的靈活性、可在線配置、修改和維護方便等優點。本文工程中的星載雷達信號處理和控制系統就是採用dsp + fpga的方式。其中信號處理採用的是xilinx公司的virtex -和virtex系列fpga和多片analogdevices公司的tigersharcts101的硬體電路結構。 -
Development scheme plans ( dsps ) prepared by the former land development corporation and its successor, the urban renewal authority, also require approval by the board
由之前的土地發展公司和現在的市區重建局擬備的發展計劃圖，也須經城市規劃委員會核準。 -
This thesis deals with design and application of a multiprocessor made of four dsps in monitoring receiver. the broadband monitoring receiver requires a kind of chip with high performance because of complicated intermediate frequency signal processing. the author selects a kind of digital signal processor called adsp21160. during the process of design, the author uses cpld, fpga and some special cpus to finish signal, processing in the monitoring receiver. cluster multiprocessor based on vxibus made of four adsp21160 is put forward. the task distribution of four dsps is solved too. furthermore, data transition methods between chips at a high speed through link ports and chip extension mode using external port are recommended. the author debugs, emulates the program in one adsp - 21160 ez - kit lite and simulates the multiprocessor program in visualdsp + +
本文主要探討了監測接收機中多dsp處理模塊的設計與應用，寬帶監測接收機的中頻處理數據量大、實時性高，這樣，對dsp晶元提出了很高的要求，作者通過比較選擇了最適用於監測接收機的數字信號處理器adsp21160 ，並結合使用了cpld 、 fpga以及一些專用的cpu來完成監測接收機中的數據處理。作者提出了由四片adsp21160組成的簇式多dsp處理模塊的結構並配以了vxi總線，論述了簇式結構的特點，解決了多dsp處理模塊中四片adsp21160的任務分配問題。
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