fet 中文意思是什麼
fet
解釋
場效晶體管-
Fet field effect transistor
場效應晶體管 -
Transistor, fet, scr, and photo - coupler testing mode
特殊測試功能，具有 -
Transistor, fet, scr, and photo coupler testing mode available
具三點量測模式，可量測電晶體 -
In the laboratory when the first - instar larvae, third - instar larvae, and fifth - instar larvae of cotton bollworm fet with all kinds of tissues of transgenic bt cotton, the result showed that transgenic bt cotton can easily cause death to low - instar larvae and this effect deteriorates on high - instar larvae
轉bt基因棉對棉鈴蟲幼蟲的行為活動有較大的影響，表現為取食時間明顯減少，靜息、吐絲下垂和爬行時間明顯延長。棉鈴蟲幼蟲取食轉bt基因棉后，發育速度的減慢導致其生育期的延長。 -
The input terminal of an fet
場效應管的控制柵。 -
In active section, the fundamentals of fet and hemt that are used as multipliers were analyzed
在有源電路部分，我們分析了fet 、 hemt作為倍頻器的基本原理。 -
In the active circuit part, based on the theories of multiplier of srd and fet, we have designed the circuit of x band 6 multiplier and ka band tripler. then they are simulated and optimized using harmonic balance method. furthermore, the results of optimization and experiments are analyzed
在有源電路部分，我們介紹了階躍管、 fet倍頻器的基本原理，在此基礎上分別設計了兩個倍頻器電路，然後利用諧波平衡法進行了模擬，並對模擬、測試結果作出了比較。 -
Five different structures are described : standard transformer coupling, parafeed, resistively loaded stage capacitively coupled to the output transformer, tube ( valve ) based constant current source load capacitively coupled to the output transformer, and solid state ( mos fet ) constant current source load capacitively coupled to the output transformer
我們將討論五種不同的方式：標準變壓器耦合；旁饋耦合；電阻性負載電容性耦合至輸出變壓器；膽恆流源負載電容性耦合至輸出變壓器；以及晶體管恆流源負載電容性耦合至輸出變壓器。 -
Along with silicon ulsi technology has seen an exponential improvement in virtually any figure of merit, as described by moore ’ s law ; the miniaturization of circuit elements down to the nanometer scale has resulted in structures which exhibt novel physical effects due to the emerging quantum mechanical nature of the electrons, the new devices take advantage of quantum mechanical phenomena that emerge on the nanometer scale, including the discreteness of electrons. laws of quantum mechanics and the limitations of fabrication may soon prevent further reduction in the size of today ’ s conventional field effect transistors ( fet ’ s )
隨著超大規模集成電路的的發展，半導體硅技術非常好地遵循moore定理發展，電子器件的特徵尺寸越來越小;數字集成電路的晶元的集成度越來越高，電子器件由微米級進入納米級，量子效應對器件工作的影響變的越來越重要，尺寸小於10nm將出現一些如庫侖阻塞等新特性。量子效應將抑制傳統晶體管fet繼續按照以前的規律繼續減小。在這種情況下，宏觀的器件理論將被替代，可能需要採用新概念的晶體管結構。 -
Remember what should be remembered, and fet what should be fotten. alter what is changeable, and accept what is mutable
記住該記住的，忘記該忘記的。改變能改變的，接受不能改變的。 -
Eventually, around the cusp of the 1980s and 90s, the relentless march of miniaturization approached sizes so small that the larger area of the slower fet - based chips could be filled with enough transistors to whomp the performance superiority of the bipolar model
在20世紀80年代和90年代的早期，晶元的小型化已經使得晶元的尺寸非常之小，以至於更小的基於fet的晶元上可以留出更多的空間，可以放置更多的晶體管，從而實現遠遠高出二極體模型的性能。 -
One can also imagine changing the orientation of the source or drain with a magnetic field, introducing an additional type of control that is not possible with a conventional fet : logic gates whose functions can be changed on the fly
想像一下，如果可以利用磁場來改變源極與汲極的磁性方向，這就等於引進了一種新的控制方法，可以製造出運作時能切換功能的邏輯閘，這是傳統fet辦不到的。 -
The paper are investigating several alternatives for example quantum dot cellular automata and single electron transistor to substitute conventional field effect transistors ( fet ’ s ) for ultra large scale integrated circuit ; and i take research on the modeling of single electron transistor and single electron cicuit
基於以上考慮，本文研究一些新的基於量子力學原理的器件如量子點細胞自動機（ qca ） 、單電子晶體管（ set ）取代以fet器件為基礎超大規模集成電路，主要在單電子晶體管建模和單電子電路綜合做了一些研究工作。 -
Comparing to fet phase shifter, the pin phase shifter has better performance in insertion loss and cost, so that the pin digital phase shifter is aboard applied in all kinds of phased - array radar system
與fet移相器相比， pin管移相器插入損耗等指標通常更好、性價比也較高，因此被各種相控陣雷廣泛應用。 -
In this system, cpld controls semiconductor laser, the fet controls surface light source by the way of changing input voltage to control current, and the pulse signal of 1khz produced by at89c2051mcu controls yag laser
系統中使用cpld控制半導體激光器，使用場效應管通過改變輸入電壓控制電流的方法來控制面光源，通過at89c2051單片機產生1khz的脈沖信號來控制yag激光器。 -
For the reason of the same frequency, we use the ldmos fet. there are three development for the middle power amplifier : the first stage power amplifier, the drive stage power amplifier and the last stage power amplifier
本文針對遙測遙控放大器與其頻率相同的特點，對中功率放大器進行研究。本文對固態線性功率放大器的研製包括：前級放大器的研製、驅動級放大器的研製、末級放大器的研製。 -
In fet devices, the presence of an electrical field at the gate moderates the flow between the source and drain
在fet器件中，柵極電場的存在會調節源極和漏極之間的電流。 -
Behavioral modeling and simulation of junction fet based on vhdl - ams
的結型場效應管行為建模與模擬 -
New fet - input amplifiers, like the ad820 family of amplifiers, incorporate design improvements that prevent output voltage phase reversal for signals within the rated supply voltage range
新型的fet輸入管放大器（如ad820系列放大器） ，在設計上做了改善，對于額定電源電壓范圍之內的信號，能夠防止輸出電壓相位反轉。 -
Circuit design is the basis of design of demultiplexer. speed, power and chip area are the main factors that should be considered in circuit design. every circuit structure has its merits and drawbacks, e. g. cmos logic family has a slower speed, but lower power, smaller area, scfl ( source couple fet logic ) family has a higher speed, but higher power, larger area. we should choose a proper circuit structure or their mixed structure for certain design to get a good tradeoff among the three factors. flip - flop is the fundamental element of demultiplexer, setup time and hold up time are key factors, which influence the speed of circuit, thus the design aim is how to reduce them. in this thesis we place emphasis on the design of scfl latches
速度、功耗、面積是電路設計要考慮的主要因素，不同的電路形式具有不同的優缺點，如cmos互補邏輯電路功耗低，面積小，速度相對較慢； scfl （源極耦合fet邏輯）電路速度高，功耗和面積較大。所以要針對具體設計需要選用適當的電路形式或其組合結構，以滿足設計要求。觸發器是分接器的基本組成單元，建立時間和保持時間是影響電路速度的關鍵，所以減小建立時間和保持時間是觸發器設計的主要目標，本文著重介紹了scfl鎖存器的設計和優化方法。
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