field programmable 中文意思是什麼
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This thesis primarily discussed the baseband processing of ss communication signal based field programmable gate array ( fpga ) asic chip
本論文主要討論和實現了基於fpga的擴頻通信信號的基帶處理。 -
Abstract : it is an efficient method that realizing the contro l circuit of a power source system with fplds ( field programmable logic devices )
文摘:使用現場可編程邏輯器件實現各種電源控制電路是一種非常有效的設計方法。 -
After the investigation of the general technology of hardware implementation, how to implement the kasumi algorithm using field programmable gate array ( fpga ) device is discussed in detail, and the author develops the cipher chip of kasumi algorithm, the kasumi cipher card based on 32 - bits pci bus, the wdm device driver that used in windows2000 / xp, and the software to demostrate encrypting data link. finally, an application demostration is constructed with all the above implementation
在此硬體實現的結果晶元基礎上，設計了32位的基於pci總線的kasumi加密卡，編寫了windows2000 xp下的windows驅動程序模型（ wdm ）驅動程序和鏈路加密應用程序，由此構成一個應用演示系統，作為研製結果的應用評估，為進一步進行第三代移動通信系統相關安全技術研究和開發提供了基礎條件。 -
In this paper, the method of digital evolvable hardware is studied based on the dynamical reconfiguration of field programmable gate array ( fpga ). in the paper, firstly, the basic conception and theory of ehw are roundly introduced and the structure characters of ehw chip are analyzed. secondly, the thought of standard evolutionary algorithm is discussed and the flow of improved evolutionary algorithms is analyzed
本文首先較全面地介紹了硬體演化技術的基本概念和原理，分析了演化硬體晶元的結構特點；其次，討論了標準演化演算法的思想並對改進型演化演算法的流程進行了分析；然後著重分析了演化硬體實現中的關鍵技術，對其實現方案進行了深入的研究，文中分別採用外部演化和內部演化兩種方式對不同的應用電路進行了演化。 -
The digitizer based on pxi bus uses fpga ( field programmable gate array ) to implement 256 points, radix - 2 dit fft ( fast fourier transform algorithm ). the design uses pipelining for fft processing and can accomplish sampling and processing signals of two channels at the same time. in the signal acquisition circuit, - a / d convector is used to enhance the precision of the signal sampling
在本設計中，採用fpga （ fieldprogrammablegatearray ）實現了256點基2dit演算法復數fft （ fastfouriertransformalgorithm快速傅氏變換演算法）處理器，具有較高的速度和運算精度fft ，設計採用流水線處理方式大大的提高了處理速度，可實現對兩個通道輸入信號的并行採集與處理。 -
Field programmable system based on 89c51 and 28f
512的現場可編程系統 -
Application of field programmable gate array in biomedical engineering
現場可編程門陣列的生物醫學工程應用 -
With the quickly development of field programmable gate array, fpga with more than million logic gates has been used
隨著fpga （現場可編程門陣列）技術的快速發展，萬門以上乃至幾十萬門邏輯陣列的使用越來越普遍。 -
Through some research in depth on soct, this thesis proposes a scheme of star - type vsat ( very small aperture terminal ) network based on overlap back transmission, and do some research on key techniques involved with the scheme and their partial realization with fpga ( field programmable gate array ), such as spread spectrum techniques, a non - coherent de - spreading spectrum and demodulation technique and adaptive interference cancel
本文在深入研究衛星重疊通信技術的基礎上，提出了一種基於重疊回傳的星形vsat網方案。並在衛星重疊通信涉及的幾種關鍵技術及其部分核心器件的fpga實現等方面進行了一些研究，包括：擴頻技術、非相干解擴解調技術、自適應干擾抵消技術等，並將它們用於基於重疊回傳的星形vsat網方案。 -
Field programmable gate arrays ( fpga ) can be programmed in the field to implement any logic circuits of requirement from user. because of their reprogrammability, they are good candidates for rapid system prototyping
現場可編程門陣列（ fpga ）器件能通過對其進行編程實現具有用戶規定功能的電路，因而特別適合集成電路的新晶開發和小批量asic電路的生產。 -
To realize the real - time tracking image target, we use the cpld ( c ' omplex programmable logic device ) to control the system logic and use ipga ( field programmable gate array ) to preprocessing the image
為了滿足系統的實時性要求，運用大規模可編程邏輯陣列cpld進行邏輯控制和現場可編程門陣列fpga對採集的視頻圖像做預處理。 -
And the controller based on vhdl ( very high speed integration circuit hardware description language ) was designed under the fpga ( field programmable gates array ) integration environment with the values gained from the train of the neural network using matlab
氣動柔性手指神經網路控制器是在已經對氣動柔性手指進行運動學和動力學分析的前提下，使用matlab對神經網路進行試訓，依據訓練所得的權值和閾值，在現場可編程門陣列集成環境下，基於超高速集成電路硬體描述語言完成的。 -
In this dissertation, the method to design and realize the digital receiver in the field programmable gate array ( fpga ) has been discussed ; combining coordinate rotation digital compute ( cordic ) to design nco, we get a efficient structure without multiplications
本論文正是運用現場可編成邏輯器件（ fpga ）設計與實現數字接收機問題開展研究，結合坐標旋轉數值計算（ cordic ）演算法實現數控振蕩器（ nco ） ，得到一種免乘法器高效可移植性好的數字接收機fpga實現結構，並在現有的硬體平臺上進行了接收機系統的調試，測試結果表明該接收機能夠達到系統指標要求。 -
Fpga ( field programmable gate array ) is a kind of programmable logic device
Fpga屬於一種可編程邏輯器件，晶元內部以陣列狀排列各種可配置邏輯塊。 -
This thesis consists of designing and implementing a jpeg encoder system that is compatiable with jpeg baseline mode using fpga ( field programmable gates array ) in standard hardware description language verilog
本文探討了以fpga （ fieldprogrammablegatesarray ）為平臺，使用hdl （ hardwaredescriptionlanguage ）語言設計並實現符合jpeg靜態圖象壓縮演算法基本模式標準的圖象壓縮晶元。 -
The system used hight - performance dsp ( tms320c6202 ) to realize the real - time image object tracking algorithm, used large - scaled programmable logical array cpld to control logic and field programmable gate array fpga to preprocessing the image
其中運用了高性能dsp （ tms320c6202 ）完成實時圖像目標處理演算法，並結合大規模可編程邏輯陣列cpld進行邏輯控制和現場可編程門陣列fpga對採集的視頻圖像做預處理，滿足了系統的實時性。 -
The main contents of the paper are : i the relationship of the accurateness of calculation, complexity of calculation and hardware resources of the 5 - 3 dwt ; ii the basic theory of pci data transmission the controlling of the host to client and the data exchanging ; iii configuration of the video decoder saa7114h to implement the transformation of the analog to the digital image ; iv image acquisition, compression and transmission from the host to the acquisition board by the component of field programmable gate array ( fpga ), digital signal processor ( dsp ) with the controller of pci and video decoder saa7114h
Pci的數據傳輸原理，外部主機如何控制從屬設備以及如何進行數據交換。配置視頻解碼器saa7114h ，實現模擬ccd攝像頭模擬數據到數字數據的轉換，實現採集的功能。用fpga 、 saa7114h和集成pci介面的dsp實現圖像的採集、壓縮以及從採集板到主機的傳輸。 -
The fast development of vlsi technology has provided the base of hardware for fpga ( field programmable gate array ) is most suitable for performing real - time pixel - level image processing operations
Vlsi技術的迅猛發展為數字圖像實時處理技術提供了硬體基礎。其中fpga （現場可編程門陣列）的特點使其非常適用於進行一些基於像素級的圖像處理。 -
This essay researched the design of linear phase fir shaping filter based on field programmable gate array ( fpga )
本文研究了利用fpga設計線性相位的fir成形濾波器。 -
In view of numerous digital and analog signals need to be processed, and the difficulty of real - time processing of multi channel 400 hz ac signal, vhdl ( vhsic hardware description language ) is applied to design the digital circuit, which is successfully realized in field programmable gates array ic - xc2s100
針對i o模塊中需要處理的數字量和模擬量較多的事實，以及多路400hz信號的實時處理較為繁重的現狀，作者採用了現場可編程門陣列（ fpga ）加以解決。
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