floating-point processor 中文意思是什麼

floating-point processor 解釋
浮點處理器
  • floating : adj. 1. 漂浮的，浮動的，流動性的。2. 【醫學】游離的。3. 移動的；不定的。4. （塗工的）第二道（漆等）。5. （船貨）未到埠的，在海上的，在運輸中的。
  • point : n 1 尖頭，尖端；尖頭器具；〈美國〉筆尖；接種針，雕刻針，編織針；小岬，小地角；【拳擊】下巴。2 【...
  • processor : n. 1. 〈美國〉農產品加工者；進行初步分類的人。2. （數據等的）分理者；【自動化】信息處理機。
  1. Through analysising the characteristics of the power system with floating neutral point deeply, the paper puts forward a new plan of single - phase to ground fault line selection on the base of s ' s signal injecton method and gives the hardware and software design. in this design, the high speed sampling and data processing is carried out through using dsp processor ; the large electrice current is drived through the application of a high - performance audio power amplifier and transformer ; the communication between host computer and detectors is realized through rs485 bus technology ; the difference multilevel frequency - selected amplifier is designed and the feeble signal of space is sampled on the base of the theory of magnetic induction ; the interface between dsp and exterior chip and rs485 interface logical is designed through using fpga ; the using of lcd module and keyboard interfacing chip makes the interface between human and machine ; the programme of host computer and detectors is designed through using blocking design method

    在本設計中，採用高速的dsp處理器，實現了對故障特徵信息的高速採集與處理;採用大功率的功放晶元與變壓器配合的方法，實現了大電流信號的驅動輸出;採用485總線技術，組建了裝置主機與多探測器之間的主從式通訊網路，實現了多干擾條件下裝置主機與多探測器的可靠通訊;設計了差分式多級選頻放大電路，採用磁感應的方法實現了對空間微弱信號的接收;利用fpga技術，實現了控制器與多外設的介面及數字信號的串並轉換;採用了先進的lcd液晶顯示模塊及鍵盤介面晶元，設計了人機信息交互的介面;採用了模塊化的軟體設計方法，開發了裝置主機及探測器的軟體程序。
  2. In chapter 5 we discuss the design of ieee754 standard fpu ( floating point unit ). processor and uart ( universal asynchronous receiver transmitter ), these cores are used in this dissertation, fpu is used for floating point complex fft processor, uart is used for fft processor " s peripheral and our test platform. in chapter 6 we discuss the design for testability, including atpg, bist and jtag method, discuss the different verification and simulation strategy in soc scale facing to different modules, build up the test platform which is used to test high performance application specified digital signal processing processor. in chapter 7 we summarize the research results and creative points, and point out the further work need to do in the future

    第五章提出了基於ieee754浮點標準的浮點運算處理器的設計和異步串列通信核的設一浙江大學博士學位論文計，提出了適合硬體實現的浮點乘除法、加減運算的結構，浮點運算處理器主要用於高速fft浮點處理功能，異步串列通信核主要用於pft處理器ip核的外圍擴展模塊以及本文所做的驗證測試平臺中的數據介面部分第六章提出了面向系統級晶元的可測試性設計包括了基於掃描測試atpg 、內建自測試bist 、邊界掃描測試jtag設計，在討論可測試性設計策略選擇的問題上，提出了針對不同模塊進行的分別測試策略，提出了層次化jtag測試方法和掃描總線法，提出了基於fpga
  3. A processor usually has two sets of general - purpose registers, one optimized for floating - point operations and the other for integer operations

    一個處理器通常有兩組通用寄存器，一組優化為用於浮點運算，一組優化為用於整數運算。
  4. 3 - d graphics on mobile phones is quite similar to 3 - d graphics on pc in years past. there is no hardware acceleration, and processor speeds are quite low, and there also is the lack of floating point arithmetic unit in mobile phones

    因此論文從通用的部分開始論述，然後明了移動平臺的特徵，並試圖解釋三維引擎的一般原理和設計一個具有粗適性的基於游戲的三維圖形引擎。
  5. Functions were added to allow access to and control of the floating point control word on both the x87 and sse2 floating point processor

    函數，以允許對x87和sse2浮點處理器上的浮點控制字的進行訪問和控制。
  6. Based on the demonstration in the project target and the technologic support, the hilss is completely constructed, which is a tightly coupled multi - processor system composed of a standard personal computer, a high - performance single chip microprocessor system and a fast - running floating point dsp system. the debugging of the outside ecu will become easier by the friendly graphical user interface, and the high - speed signal transfer through all the parts. besides, the hilss can be expanded conveniently for its modular components

    在這一系統中， pc上位機、單片機和dsp系統通過共享存儲器構成了一個緊密耦合的多處理器平臺，友好的圖形化用戶界面、高速的信息採集和控制響應、模塊化的系統功能構成為外部電控系統的調試創造了良好的開發環境，同時也為系統今後進一步的擴展奠定了扎實便利的基礎。
  7. On the one hand it is important for the design of floating - point processor unit to optimize speed while algorithms of high - speed are introduced. for examples, two - path of high - speed floating - point addition, booth coding of floating - point multiplication. srt of floating - point division and square root, cordic of transcendental function and so on

    一方面浮點處理部件設計重點在於速度的優化，所以採用優化的高速演算法，如浮點加法的two - path 、浮點乘法的booth編碼、浮點除法和平方根的srt演算法以及超越函數的cordic演算法等。
  8. In march 2003, dawning launched 4000l servers, by far the topmost model of data processor in china with a computing speed of 4, 200 giga floating point operation per second ( gflops )

    二零零三年三月，曙光信息成功研製出國內最大型、每秒運算為4 . 2萬億次的超級服務器? ?曙光4000l ，並隨即將產品銷售至石油勘探領域。
  9. Technique. suppose there are six steps as in ieee arithmetic hardware in a floating - point addition as shown in figure 2. a vector processor does these six steps in parallel - if the i

    向量處理器可以并行處理這六個步驟如果第i個數組元素是在第4個步驟中被添加的，那麼向量處理器就會為第（ i + 1 ）個元素執行第3個步驟，為第（ i + 2 ）個元素執行第2個步驟，依此類推。
  10. Linux for pseries is especially compelling for solutions requiring a 64 - bit architecture or the high - performance floating - point capabilities of the power processor

    對于需要64位體系結構或power處理器的高性能浮點處理能力的解決方案來說， pseries上的linux非常具有競爭力。
  11. In march 2003, dawning launched 4000l servers, by far the topmost model of data processor in china with a computing speed of 4, 200 giga floating point operation per second gflops. dawning 4000l was soon deployed in the area of oil exploration

    二零零三年三月，曙光信息成功研製出國內最大型每秒運算為4 . 2萬億次的超級服務器曙光4000l ，並隨即將產品銷售至石油勘探領域。
  12. With performance of up to 900 million floating - point operations per second ( mflops ) at a clock rate of 150 mhz, tms320c6711 is fit to tackle with the problem. this thesis made a deep research on the h. 263 standard and the tms320c6711. we propose the plan of the software and the hardware for the realization of the h. 263 protocol which include the structure of the whole program, the c code of the key algorithm of the h. 263, the c code of some subprogram, and the circuit for image processing with the tms320c6711 as the processor. furthermore, we optimize some subprogram in common use to make the coding more quickly. we encode a video sequence with the tms320c6711dsk successfully, even if the compression rate is as high as 100, video effect we get after decoding the code stream is satisfying

    首先系統地研究了h . 263協議編碼器的基本演算法，句法，碼流結構和tms320c6711dsk的原理結構以及ccs2 . 0的開發環境；在系統的軟體方面給出了總體流程圖，對于h . 263協議編碼器的某些核心演算法和子程序，給出了部分源代碼，對于dsp的各種代碼優化方法進行了討論，並且對代碼進行優化，從而在提高系統處理速度的同時減少代碼大小和內存需求量；硬體方面以tms320c6711為核心處理器，提出了基於tms320c6711的圖像處理平臺的硬體實現方案，並給出了原理電路圖；最後在tms320c6711dsk上成功對視頻數據進行高壓縮比（ 100倍以上）的編碼，對回傳的結果解碼后得到了令人滿意的效果。
  13. Perhaps this has something to do with the floating - point architecture of the dragonball processor

    也許這與dragonball處理器的浮點體系結構有關系。
  14. The ip cores used in this system include an integer processor core compatible with the intelx86 integer instruction set and an floating - point processor core compatible with the intelx86 floating - point instruction set, which are developed by ourselves

    該系統中採用的ip核主要包括自主研發的兼容intelx86定點指令集的定點微處理器核和兼容intelx86浮點指令集的浮點微處理器核，還包括片上rom核、連接soc外部的介面等。
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