fpga field programmable gate array 中文意思是什麼
fpga field programmable gate array
解釋
現場可編程門陣列-
This thesis primarily discussed the baseband processing of ss communication signal based field programmable gate array ( fpga ) asic chip
本論文主要討論和實現了基於fpga的擴頻通信信號的基帶處理。 -
After the investigation of the general technology of hardware implementation, how to implement the kasumi algorithm using field programmable gate array ( fpga ) device is discussed in detail, and the author develops the cipher chip of kasumi algorithm, the kasumi cipher card based on 32 - bits pci bus, the wdm device driver that used in windows2000 / xp, and the software to demostrate encrypting data link. finally, an application demostration is constructed with all the above implementation
在此硬體實現的結果晶元基礎上，設計了32位的基於pci總線的kasumi加密卡，編寫了windows2000 xp下的windows驅動程序模型（ wdm ）驅動程序和鏈路加密應用程序，由此構成一個應用演示系統，作為研製結果的應用評估，為進一步進行第三代移動通信系統相關安全技術研究和開發提供了基礎條件。 -
In this paper, the method of digital evolvable hardware is studied based on the dynamical reconfiguration of field programmable gate array ( fpga ). in the paper, firstly, the basic conception and theory of ehw are roundly introduced and the structure characters of ehw chip are analyzed. secondly, the thought of standard evolutionary algorithm is discussed and the flow of improved evolutionary algorithms is analyzed
本文首先較全面地介紹了硬體演化技術的基本概念和原理，分析了演化硬體晶元的結構特點；其次，討論了標準演化演算法的思想並對改進型演化演算法的流程進行了分析；然後著重分析了演化硬體實現中的關鍵技術，對其實現方案進行了深入的研究，文中分別採用外部演化和內部演化兩種方式對不同的應用電路進行了演化。 -
The digitizer based on pxi bus uses fpga ( field programmable gate array ) to implement 256 points, radix - 2 dit fft ( fast fourier transform algorithm ). the design uses pipelining for fft processing and can accomplish sampling and processing signals of two channels at the same time. in the signal acquisition circuit, - a / d convector is used to enhance the precision of the signal sampling
在本設計中，採用fpga （ fieldprogrammablegatearray ）實現了256點基2dit演算法復數fft （ fastfouriertransformalgorithm快速傅氏變換演算法）處理器，具有較高的速度和運算精度fft ，設計採用流水線處理方式大大的提高了處理速度，可實現對兩個通道輸入信號的并行採集與處理。 -
With the quickly development of field programmable gate array, fpga with more than million logic gates has been used
隨著fpga （現場可編程門陣列）技術的快速發展，萬門以上乃至幾十萬門邏輯陣列的使用越來越普遍。 -
Through some research in depth on soct, this thesis proposes a scheme of star - type vsat ( very small aperture terminal ) network based on overlap back transmission, and do some research on key techniques involved with the scheme and their partial realization with fpga ( field programmable gate array ), such as spread spectrum techniques, a non - coherent de - spreading spectrum and demodulation technique and adaptive interference cancel
本文在深入研究衛星重疊通信技術的基礎上，提出了一種基於重疊回傳的星形vsat網方案。並在衛星重疊通信涉及的幾種關鍵技術及其部分核心器件的fpga實現等方面進行了一些研究，包括：擴頻技術、非相干解擴解調技術、自適應干擾抵消技術等，並將它們用於基於重疊回傳的星形vsat網方案。 -
In this dissertation, the method to design and realize the digital receiver in the field programmable gate array ( fpga ) has been discussed ; combining coordinate rotation digital compute ( cordic ) to design nco, we get a efficient structure without multiplications
本論文正是運用現場可編成邏輯器件（ fpga ）設計與實現數字接收機問題開展研究，結合坐標旋轉數值計算（ cordic ）演算法實現數控振蕩器（ nco ） ，得到一種免乘法器高效可移植性好的數字接收機fpga實現結構，並在現有的硬體平臺上進行了接收機系統的調試，測試結果表明該接收機能夠達到系統指標要求。 -
Fpga ( field programmable gate array ) is a kind of programmable logic device
Fpga屬於一種可編程邏輯器件，晶元內部以陣列狀排列各種可配置邏輯塊。 -
The system used hight - performance dsp ( tms320c6202 ) to realize the real - time image object tracking algorithm, used large - scaled programmable logical array cpld to control logic and field programmable gate array fpga to preprocessing the image
其中運用了高性能dsp （ tms320c6202 ）完成實時圖像目標處理演算法，並結合大規模可編程邏輯陣列cpld進行邏輯控制和現場可編程門陣列fpga對採集的視頻圖像做預處理，滿足了系統的實時性。 -
The main contents of the paper are : i the relationship of the accurateness of calculation, complexity of calculation and hardware resources of the 5 - 3 dwt ; ii the basic theory of pci data transmission the controlling of the host to client and the data exchanging ; iii configuration of the video decoder saa7114h to implement the transformation of the analog to the digital image ; iv image acquisition, compression and transmission from the host to the acquisition board by the component of field programmable gate array ( fpga ), digital signal processor ( dsp ) with the controller of pci and video decoder saa7114h
Pci的數據傳輸原理，外部主機如何控制從屬設備以及如何進行數據交換。配置視頻解碼器saa7114h ，實現模擬ccd攝像頭模擬數據到數字數據的轉換，實現採集的功能。用fpga 、 saa7114h和集成pci介面的dsp實現圖像的採集、壓縮以及從採集板到主機的傳輸。 -
The fast development of vlsi technology has provided the base of hardware for fpga ( field programmable gate array ) is most suitable for performing real - time pixel - level image processing operations
Vlsi技術的迅猛發展為數字圖像實時處理技術提供了硬體基礎。其中fpga （現場可編程門陣列）的特點使其非常適用於進行一些基於像素級的圖像處理。 -
This essay researched the design of linear phase fir shaping filter based on field programmable gate array ( fpga )
本文研究了利用fpga設計線性相位的fir成形濾波器。 -
The real - time demand during the processing of detection can be well satisfied by this method through fpga （ field programmable gate array ） device
將該方法用fpga實現，滿足了檢測過程中的實時性。 -
This paper describes a test architecture for minimum number of test configurations in test of fpga field programmable gate array luts look up tables
特別地， fpga適用於這樣一些系統的原型，即其正確操作對于評價新型體系結構是必要的。 -
The arithmetic designed in this paper uses few memories in the compression of multi - spectral image. in applications, we do not have to place memorizers on the compress card, but only 24 blockrams are needed in the fpga ( field programmable gate array ), so we can reduce the weight 、 volume and energy consumption of the space equipment. at last, software and hardware are designed to implement the arithmetic
本課題提出的演算法只使用少量的存儲器就可以實現對多光譜圖像數據的壓縮，在實際應用當中，只需佔用24片fpga （ fieldprogrammablegatearray ）內部的blockram ，而不需引入片外存儲器，可以減少機載設備的質量、體積和能耗。 -
This is one kind project of hardware multiplexer based on the high - performance system on a programmable chip ( sopc ). in the project author integrate with the software and the hardware on a field programmable gate array ( fpga ), not only simplifying the overall system design, moreover realizing stably, high speed, low cost multiplexer ’ s design. the dissertation carry on three verification step that include function verification 、 time verification and prototype verification to guarantee each ip can work normally to satisfy the system performance requirement. then author introduce the realization of the multiplexer in detail, as well as the test and the debugging questions met in practice and solution of the questions
本方案是一種基於可編程片上系統（ sopc ）的硬體復用器設計方案，其特點是將系統的軟體和硬體集成在一款現場可編程門陣列（ fpga ）上，使用該方案不但簡化了整個系統，而且實現了穩定、高速、低成本的復用器設計。對系統中各個功能模塊的整合和驗證採用功能模擬、時序模擬、原型驗證三個步驟進行，保證系統中各個功能模塊可以正常工作，並滿足系統的性能要求。然後詳細介紹了復用器的實現，以及測試和調試中遇到的問題及解決方法。 -
For real time image processing, this paper design a system of digtal image processing based on fpga ( field programmable gate array )
在設計過程中，廣泛查閱了相關資料，在消化資料的基礎上，比較了不同的方法的優劣，提出了基於fpga的實現方案。 -
With recent advance in micro - electronics technologies, fpga ( field programmable gate array ) has become more and more important in digital system design, because of its high performance in terms of scalability, functionality and so on
近幾年來，由於微電子技術的迅猛發展，使得fpga （現場可編程門陣列， fieldprogrammablegatearray ）的性能指標，比如規模、功能等越來越好。因此， fpga在數字系統設計中占據了越來越重要的位置。 -
We focus on the carrier synchronization method, the circuit and its parameters design, the performance simulation and the circuit implementation in field programmable gate array ( fpga )
重點研究載波同步方法，設計電路及參數，模擬同步性能，並在現場可編程門陣列（ fpga ）上實現同步電路。 -
Pipelining and parallel technology, accompanying with fast fifo as cache memory, instead of direct program operation, are adopted in the scheme and increase the transmitting speed dramatically ; fpga ( field programmable gate array ) is applied to realize the complex control logic of the system and makes it integrative, flexible and fast ; 386ex based embedded system, along with vxworks real - time operating system is introduced to substitute the microcontroller based system to simplify the hardware design and enhance the overall performance of ssr, and will make the system more easier to be applied to the projects in the future
該設計方案採用了流水線和并行技術，配以快速fifo緩存的方式取代了直接對flash進行編程的方式，極大地提高了閃存晶元存儲數據的速率；採用fpga技術實現系統的主要控制邏輯，集成度高、靈活性好、速度快；採用基於386ex的嵌入式系統及基於vxworks的嵌入式實時操作系統，取代單片機系統及其編程，提高了系統的整體性能，減輕了硬體設計的負擔，且使系統研發的延續性好。
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