function processor 中文意思是什麼

function processor 解釋
函數處理機
  • function : n 1 功能，官能，機能，作用。2 〈常 pl 〉職務，職責。3 慶祝儀式；（盛大的）集會，宴會。4 【數學】...
  • processor : n. 1. 〈美國〉農產品加工者；進行初步分類的人。2. （數據等的）分理者；【自動化】信息處理機。
  1. Micro computer processor to ensure the setting of the bag length without changing any parts. please counter, bag length, packing speed indicator are the part of the function

    微電腦袋長控制器，可任意設置袋長而無須更換零件，並可預制計數，顯示包裝速度，袋長等。
  2. Their originally developed " super mpeg - 2 pre post processor " enables high quality picture recording playback, and equipped with their " intelligent 2 pass encode " technology, high picture quality dubbing from hdd to dvd is possible. mr. namiki explained that jvc will continue to appeal technology in their dvd recorders with the " 3 - in - 1 function, video quality, and easy use " points in developing their dvd recorders. cyberlink, inc

    他對使用自行開發的" super mpeg - 2 encode pre post processor "進行錄像和播放時的高畫質技術進行了說明，還介紹了日本victor株式會社正在開發的著眼于"三合一功能畫質方便性"的dvd錄像機，該錄像機採用" intelligent 2 bus encode "技術，以使hdd能向dvd進行高畫質轉錄的這些技術為基礎。
  3. With the development of the network and the multi - processor system, the research, simulation and the impemeni of the system - level fault diagnosis which is the very important means to increase the reliability of the system, are becoming more and more important. on the system - leve1 fault diagnosis, based on the group theory of system - level fault diagnosis that has been put forward by pro f zhang, the paper constructs newly the theory bases, improves on the matrix method, reinforces and consummates group arithmetic of all kinds of test mode, for the first time, analyses and discusses the equation solution of all kinds of models, so al1 the consistent fault patterns ( cfp ) could be found, straightly and high efficiently, even if the sufficient and necessary condition of t - diagnosable is dissatisfied and the complexity of system - level fault diagnosis is greatly decreased, especialy in strong t - diagnosabl6 system. last the simulation system ' s function has been extended and the application hotspot and the development trend have been disscussed

    本人在張大方教授等人提出的基於集團的系統級故障診斷的理論基礎上，重新構建了系統級故障診斷的理論基礎，定義了系統級故障診斷測試模型的三值表示；改進了系統級故障診斷的矩陣方法，重新定義了測試矩陣、鄰接矩陣、結點對、結點對的相連運算、極大準集團和斜加矩陣，由此能直觀、簡便地生成集團和極大獨立點集；補充和完善了各類測試模型的系統級故障診斷的集團演算法，通過定義集團測試邊和絕對故障集，簡化了集團診斷圖，由此能較易地找到所有的相容故障模式，即使不滿足t -可診斷性，大大減少了系統級故障診斷的復雜度，尤其是對強t -可診斷系統；首次分析探討了各類測試模型的方程解決，由此從另一角度能系統地、高效率地求出所有的相容故障模式（ cfp ） ：擴充了系統級故障診斷模擬系統的功能，快速、直觀和隨機地模擬實驗運行環境，進行清晰和正確的診斷，同時提供大量的實驗數據用於理論研究，優化演算法和設計。
  4. For accomplishing the whole computer integration of the system, the workflow management technology ( or system ) is introduced by this paper to solve highly integrated computer system, including function, info and procedure integration, therefore to accomplice the integrated scheduling management system ; and the software frame of the computer whole integrated system is put forward, based on the technology of the distributing workflow service / workflow processor

    為實現整體集成，本文提出了以工作流管理技術（ workflowmanagementtechnology ）實現水利樞紐信息、功能以及過程集成，從而實現集成化的調度管理；並給出了基於分散式工作流服務工作流機的整體集成實現的軟體框架。
  5. It " s function is to receive laser signal and to sent out the electric signal ; the second is the monolithic processor system. this part function is to pick up the electric signal sent by ccd detector and to compute the digital signal to get the data where the laser beamed, then sent the data to pc computer ; the third part is the control interface for people to control whole measurement process

    本文介紹的桁架梁撓度實時檢測的電荷耦合（ ccd ）測量系統由ccd接收系統，單片機測量系統和pc機測量軟體三部分組成。該系統採用線陣ccd為傳感器，以8031為控制核心，在單片機系統和pc機軟體之間建立了可靠的通信，能在比較惡劣的條件下獲取、顯示、存儲、處理和比較桁架的撓度值。
  6. The element - available ( ) function returns a boolean value that indicates whether the element specified is supported by the xslt processor

    函數的作用是：返回一個邏輯值，用於指定xslt處理器是否允許支持指定的元素。
  7. As the requirements of its function, a bus control interface board has already been designed. also the paper have provided the scenarios demonstration for the bus control interface board ( bcib ), the design for the protocol of communication, the hardware for bcib, the software for bcib, and the software for the processor ' s communication. while the analysis for the capability of real - time and the calibration and test for subsystem have been also finished. during the design, the system advanced ability, reliability, resources availability and the cost - efficency ratio are considered. the issus such as system integrated control, mutual exclusion of the shared storages, generation of handshaking signal and system self - test were resolved

    本論文主要對航空自衛系統的綜合化方式進行了深入研究，並按其功能等方面要求，對航空自衛系統綜合化總線通信模塊進行了設計，主要完成了總線通信模塊方案論證、通訊協議設計、總線通信模塊硬體設計、總線通信模塊（ bcib ）軟體設計、處理機通信軟體設計、實時性分析、系統調試、試驗等項工作，在設計過程中，綜合考慮了系統先進性、資源利用率、費效比及可靠性等因素；重點解決了系統綜合控制方式、共享存儲器互斥、握手信號產生及系統自檢測等問題。
  8. In this paper, the circuit used for testing sheet resistance is designed using single chip processor. additionally, we have expressed van der pauw function as a polynomial form through local and global reversal development by using the normalized polynomial match, being convenient not only for programming, but also for sheet resistance testing when using van der pauw and rymaszewski methods

    本文還利用單片機系統設計了薄層電阻測試電路，對于程序中用到的范德堡隱函數，利用非線性反演和規范化擬合的方法推導出其多項式顯函數形式。這不僅給對我們編寫程序提供了方便，也為使用范德堡法和rymaszewski法測量薄層電阻提供了便利。
  9. Aim at the dtc ' s blemish mentioned above and the direction of dtc technique development, the dissertation put great emphasis on the work as follows, with an eye to exalt dtc system function : ( 1 ) a new speed - flux observer of an induction motor is proposed to enhance the accuracy of flux observing, which is an adaptive closed - loop flux observer and different from the traditions. a new adaptive speed - observation - way is deduced out according to the popov ' s stability theories ; ( 2 ) to improve the performance of dtc at low speed operation, we have to exalt the accuracy of the stator flux estimation and a new way of bp neural network based on extended pidbp algorithm is given to estimate and tune the stator resistance of an induction motor to increase the accuracy of the stator flux estimation ; ( 3 ) digital signal processor is adopted to realize digital control. an device of direct torque control system is designed for experiment using tms320lf2407 chip produced by ti company ; ( 4 ) bring up a distributed direct torque control system based on sercos bus, sercos stand for serial real time communication system agreement which is most in keeping with synchronous with moderate motor control ; ( 5 ) the basic design frame of the hardware and software of the whole control system is given here and some concrete problem in the experiments is described here in detail

    針對上面提到的直接轉矩控制的缺陷和未來直接轉矩控制技術發展方向，本論文重點做了以下幾個方面的工作，目的在於提高dtc系統的綜合性能： （ 1 ）提出一種新型的速度磁鏈觀測器，新型的速度磁鏈觀測器採用自適應閉環磁鏈觀測器代替傳統的積分器從而提高磁鏈觀測的精度，並且根據popov超穩定性理論推導出轉速的新型自適應收斂律； （ 2 ）改善系統的低速運行性能，主要從提高低速時對定子磁鏈的估計精度入手，提出了一種提高定子磁鏈觀測精度的新思路? ?利用基於bp網路增廣pidbp學習演算法來實時在線地修正定子電阻參數； （ 3 ）採用數字信號處理器dsp實現系統全數字化硬體控制，結合ti公司生產的tms320lf2407晶元，設計了直接轉矩控制系統的實驗裝置； （ 4 ）提出了基於sercos總線網路化分散式的直接轉矩控制系統， sercos （ serialrealtimecommunicationsystem ）是目前最適合同步和協調控制的串列實時通信協議； （ 5 ）基本勾勒出整個控制系統的硬體和軟體設計基本框架，詳細描述一些實驗中的具體的細節問題。
  10. A visual device with the function of pitching and tilt and a control system to camera with the function to adjust the aperture and focus in time have designed as well as a processor of image to capture, process and matching have been also designed

    基於主動視覺，設計了一個具有上下俯仰、水平轉動的視覺裝置，和能夠實時調整光圈、焦距等成像參數的攝像頭控制系統。建立了一個能夠進行實時圖像採集、圖像處理，目標匹配的圖像處理系統。
  11. Smpdca architecture has six outstanding excellences : complexity of the control logics of smpdca is lower than large scale superscalar ; supplying shortest inter - processor communication latency using the shared li data cache ; no cost to maintain cache coherence ; hit rate of data cache increase ; easy to reuse many softwares of symmetric multiprocessor ( smp ) ; exploit the parallelism of applications from many levels. this paper present the architecture model of smpdca, and illustrated its function units, and discussed its key techniques, and analyzed the address image policy of multi - ported cache

    Smpdca結構具有六個突出優勢：相對于大規模的超標量結構而言， smpdca結構的控制邏輯復雜性明顯要低得多；相對于通過共享主存來實現處理器之間的通信的結構而言，通過一個共享的第一級數據cache來實現處理器之間的通信的smpdca結構能夠提供非常小的處理器之間的通信延遲；沒有cache一致性維護開銷；數據cache命中率提高；便於smp （對稱多處理器結構）的軟體重用；從多個層次上開發程序的并行性。
  12. All result data indicate that random test can play a very valid role in function verification of embedded processor

    所有的數據表明，隨機測試在嵌入式處理器的功能驗證中能夠起到非常有效的作用。
  13. On the one hand it is important for the design of floating - point processor unit to optimize speed while algorithms of high - speed are introduced. for examples, two - path of high - speed floating - point addition, booth coding of floating - point multiplication. srt of floating - point division and square root, cordic of transcendental function and so on

    一方面浮點處理部件設計重點在於速度的優化，所以採用優化的高速演算法，如浮點加法的two - path 、浮點乘法的booth編碼、浮點除法和平方根的srt演算法以及超越函數的cordic演算法等。
  14. The thesis first probably explains brushless direct current motor ( bldcm ), and discusses the related control methods, explains the background and meaning of back electromotive force ( back - emf ) which is used in the thesis. then the thesis expounds the basic component parts, the basic running principle, the running characteristic and transfer function of the bldcm. and then the thesis detailedly dissertates its research pivot : the simulation of bldcm system in matlab based on the method of back - emf and the control system of digital signal processor ( dsp ) based on the method of back - emf

    本文首先對無刷直流電機進行了概述，並對其相關控制方法進行了討論，說明本文所採用反電動勢法的背景和意義;接著論述了無刷直流電機基本組成環節、基本工作原理、運行特性和傳遞函數，然後是詳述本文研究的重點:基於反電動勢法的matlab調速系統的模擬以及基於反電動勢法的dsp控制系統的實現。
  15. Use track marking function in word processor to edit received documents instead of printing the drafts out to make hand - written comments

    利用追蹤修訂功能在電腦上修改收到的文件，代替將草稿印出來然後用筆修改。
  16. According to different function, the hardware part is divided into processor module, analog signals input and converting module, digital signals module, communication module, clock module and display module

    按照功能的不同，硬體劃分成處理器系統模塊、模擬信號輸入和轉換模塊、開關量輸入輸出模塊、通信模塊、時鐘模塊、鍵盤顯示模塊、電源模塊。
  17. The apparatus includes a multimedia processor for performing a multimedia function when a controller is in a sleep mode wherein the controller is converted to an active mode when a specified key signal is input into the controller in the sleep mode and wherein the controller outputs an inactive signal to inactivate the multimedia processor

    該裝置包括一個多媒體處理器，當控制器處于休眠模式時，該多媒體處理器可以執行多媒體功能，其中當某一特殊關鍵信號輸入到處于休眠模式的控制器時，該控制器可轉為激活狀態，並且其中所述控制器輸出一個去激活信號，去激活多媒體處理器。
  18. A co - processor - unit has been implemented for convolution in image processing coupled with host with isa, which is directly accessed by system function call

    數學協處理器與asp公用一個可重構邏輯資源，由x86主處理器分時異步地重構為不同的專用部件。
  19. The task in the paper comprises two parts. the software design procedure works as follow, program the drivers for module on pc with cvi, generate the corresponding ddl and then edit the test serial and invoke the ddl by designing soft panel with vc + + 6. 0. thus facilitate users to control module to conduct high speed data test. the hardware design procedure works as follow, design vxi message based interface circuit and plesio - fdc circuit with fast data transport function on xc2vp30, a virtex - ii pro series fpga chip designed by xilinx company which integrates power - pc processor

    筆者負責的工作包括軟體設計和硬體設計兩部分:軟體設計是用cvi工具編寫模塊在pc機上的驅動程序，生成動態連接庫，再用visualc + + 6 . 0設計軟面板，實現測試矢量的編輯和動態連接庫的調用，讓用戶很方便地控制模塊進行高速數據測試;硬體設計是在xilinx公司的一片集成了power - pc處理器的virtex - iipro系列fpga晶元xc2vp30上完成vxi總線的消息基介面電路設計和具有快速數據傳送功能的準fdc電路[ 1 ] [ 2 ]設計。
  20. In the first step, the author introduces the rtxc real time operation system and illustrate in detail the boot code design of arm processor, secondly, the author offers a whole structure under this operation system and explains the function of this software in terms of four relative tasks, in which the signal processing module, interface interrupt processing module, system operation measuring and controlling module and rc & lc information processing module are illustrated at length

    先介紹了實時操作系統rtxc ，詳細闡述了arm處理器啟動代碼程序的設計，然後給出了在此操作系統下軟體設計的整體結構，分四個任務分別闡述此軟體功能，其中詳細介紹了信令處理模塊、介面中斷處理模塊、系統運行監測模塊和rc消息lc消息處理模塊。
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