gate delay time 中文意思是什麼
gate delay time
解釋
門信號延遲時間-
A time measurement for a given computer word to pass a given point as in serial storage delay - lines. all of the bits of a word must pass through the input control gate ; the beat is then the sum of all the bits times
在串列存儲延遲線中，計算機字通過某指定點的一種時間度量。該字的所有位必須通過輸入控制門，拍則是所有位時間之和。 -
The circuit is based on the conventional delay - superposition algorithm realized by the field programming gate array ( fpga ). the circuit makes it possible to deinterleave and track with pri in real time
本文還利用fpga對重頻跟蹤電路進行了設計，根據延遲重合法提出一種新的實現方案，由於不用進行首脈沖的確定，使得實時跟蹤成為可能。 -
Due to the subtle error among different manufacturing equipment, the gate delay of circuits is different and varies in a given scope, which induces the time uncertainty of the waveform
由於製造設備本身存在微小誤差，具體門的延時並不相同，而是在一定范圍內變化，引起波形變化的時間不確定。
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