gate voltage 中文意思是什麼
gate voltage
解釋
場效應晶體管柵壓-
This voltage creates a field across the gate oxide, which causes the adjacent p substrate to invert to n-type.
這一電壓在柵極氧化物層上產生一個電場，它導致毗鄰的P型襯底轉變成N型。 -
It is found that the main electronic conduction mechanism in the high field regions of the i - v characteristics is identified to be fowlernordheim tunneling. the effect of y ray on sic mos c - v characteristics depends strongly on the bias voltage applied to the gate electrode during irrad
當氧化層中存在較強電場時，電離輻照對s匯mos電容的影響會更明顯， sicmos器件比st器件具有更好的抗y輻照的能力。 -
A model of the interface state density distribution near by valence band is presented, and the dependence of the threshold voltage on temperature, the c - v characteristics and the subthreshold characteristics are predicted exactly with this model ; the effects of s / d series resistance on the output characteristics, transfer characteristics and effective mobility of sic pmosfets are analyzed. thirdly, the output characteristics and the drain breakdown characteristics are modeled with the procedure medici. the output characteristics in the room temperature and 300 ? are simulated, and the effects of gate voltage. contact resistance, interface state and other factors on sic pmos drain breakdown characteristics are analyzed
提出了一個價帶附近的界面態分佈模型，用該模型較好地描述了sicpmos器件閾值電壓隨溫度的變化關系、 c - v特性曲線以及亞閾特性曲線；分析了源漏寄生電阻對sicpmos器件輸出特性、轉移特性以及有效遷移率的影響；論文中用模擬軟體medici模擬了sicpmos器件的輸出特性和漏擊穿特性，分別模擬了室溫下和300時sicpmos器件的輸出特性，分析了柵電壓、接觸電阻、界面態以及其他因素對sicpmos擊穿特性的影響。 -
Charge pump circuits that make use of charge accumulation in the capacitor can pump charge upward to produce voltage higher than the regular supply voltage, and they are widely used in memory circuits, such as flash memory, for the programming and erasing of the floating - gate devices
電荷泵是一種運用電荷在電容中的積累來產生高壓（高於電源電壓）的電路，它廣泛應用在存儲器電路中，諸如flashmemory ，用於對懸浮柵器件進行寫或擦除操作。 -
By comparing and analyzing the advantages and disadvantages of three kinds of voltage reference circuits, type of current density ratio compensation 、 weak inversion type and type of poly gate work function, a cascode structure of type of current density ratio compensation is chosen to form the core of voltage reference circuit designed in this paper. applying the negative feedback technology, an output buffer and multiply by - 2 - circuits are designed, which improve the current driving capability
然後通過比較和分析電流密度比補償型、弱反型工作型和多晶硅柵功函數差型三種帶隙電壓基準源電路結構的優缺點，確定了電流密度比補償型共源共柵結構作為本設計核心電路結構，運用負反饋技術設計了基準輸出緩沖電路、輸出電壓倍乘電路，改善了核心電路的帶負載能力和電流驅動能力。 -
Based on the hydrodynamic energy transport model, the influence of variation of negative junction depth caused by concave depth on the characteristics of deep - sub - micron pmosfet has been studied. the results are explained by the interior physical mechanism and compared with that caused by the source / drain depth. research results indicate that with the increase of negative junction depth ( due to the increase of groove depth ), the threshold voltage increases, the sub - threshold characteristics and the drain current driving capability degrade, and the hot carrier immunity becomes better in deep - sub - micron pmosfet. the short - channel - effect suppression and hot - carrier - effect immunity are better, while the degradation of drain current driving ability is smaller than those with the increase of depth of negative junction caused by source / drain junction shallow. so the variation of concave depth is of great advantage to improve the characteristics of grooved - gate mosfet
基於能量輸運模型對由凹槽深度改變引起的負結深的變化對深亞微米槽柵pmosfet性能的影響進行了分析，對所得結果從器件內部物理機制上進行了討論，最後與由漏源結深變化導致的負結深的改變對器件特性的影響進行了對比.研究結果表明隨著負結深（凹槽深度）的增大，槽柵器件的閾值電壓升高，亞閾斜率退化，漏極驅動能力減弱，器件短溝道效應的抑制更為有效，抗熱載流子性能的提高較大，且器件的漏極驅動能力的退化要比改變結深小.因此，改變槽深加大負結深更有利於器件性能的提高 -
Results show that threshold voltage uniformity of mesfet fabricated in planar selectively implanted process is better than that of in recessed - gate process
結果表明，採用平面工藝制備的gaasmesfet閾值電壓均勻性比採用挖槽工藝制備的gaasmesfet閾值電壓均勻性更好。 -
In order to study the influence of different process on the threshold voltage uniformity, gaas mesfets are fabricated both in recessed - gate process and planar selectively implanted process
分別對採用隔離注入挖槽工藝和平面選擇離子注入自隔離工藝制備的gaasmesfet閾值電壓均勻性進行了比較研究。 -
Voltage controlled gate cg module
電壓控制門組件 -
Slowly - drop gate voltage and softly turn - off principles are explained in this article, specific parameters are also listed
摘要闡述了軟降柵壓和軟關斷的過電流保護原理，列出具體的保護時序參數。 -
A particular over - current protection and drive circuit is given, the impact of resistance between gate and emitter on gate voltage dropping is discussed, and an adjustable gate - emitter resistance circuit is put forward
設計了過電流保護驅動電路，討論了柵射集電阻對降柵壓過程的影響，並提出一種可變柵射集電阻電路。 -
In gan hemt drain pulse current collapse experiments, drain current under pulse condition collapsed about 50 % than direct current condition and the pulse signal frequency affected little on current collapse. when gate voltage is small, the relationship between pulse width and drain current is i0 ( + t / 16 )
在ganhemt漏極脈沖電流崩塌測試中，發現脈沖條件下漏極電流比直流時減小大約50 % ;脈沖信號頻率對電流崩塌效應影響較小;當柵壓較小時，隨著脈沖寬度的改變漏極電流按i0 （ + t / 16 ）的規律變化。 -
In this paper, the theory of negatively charged surface states is used to investigate dynamic breakdown characteristics and the increase of gate - drain breakdown voltage as well as the reduction of saturated drain - source current after sulfur passivation. the measure which can improve the stability of sulfur passivation is proposed
本論文通過對gaasmesfet擊穿機理和硫鈍化機理的研究，用負電荷表面態理論，解釋了gaasmesfet動態擊穿特性及硫鈍化后柵漏擊穿電壓增大、源漏飽和電流減小的機理，提出了改善硫鈍化穩定性的措施。 -
We find that a gate voltage on a gate capacitor will excite a potential distribution similar to that of a single charge soliton. we call it a static potential soliton. what " s important is that the profile of such a soliton can be changed proportionally and continuously
我們發現給一個門電容加上門電壓將會在結鏈中激發一個類似於單電荷孤子的電勢分佈，並將其稱為靜電勢孤子，只是這種孤子的輪廓可以成任意比例地連續變化。 -
We can obtain the trap density by measuring the change of gate voltage of mos capacitance under constant current stress and the change of high frequency c - v curve before and after the stress
該方法根據電荷陷落的動態平衡方程，測量恆流應力下mos電容的柵電壓變化曲線和應力前後的高頻cn曲線變化求解陷階密度。 -
The emphases of our research works are as follows : under ultra - low temperature ( about 0. 236k ) conditions, how the frequency and power of the saw and the source drain voltage influence the acoustic current ; and the relationship between the source drain current and the split - gate voltage ; and how to find the cut off voltage of the quasi - 1d electron channel ; and also the frequency character of the idt in the saw parts
研究的重點為，在甚低溫（ 0 . 236k ）下，通過實驗研究表面聲波的頻率和功率，源漏偏壓等因素對聲電電流的影響;研究準一維電子通道中不同源漏電流與分裂門負偏壓的關系，以找到分裂門的鉗斷點電壓;以及研究聲表面器件叉指換能器的頻率特性等。 -
An hfo2 layer with less than 3. 5nm eot was obtained and show good electrical properties. the gate leakage current at a gate voltage bias of iv is less than 10 - 7 a / cm2
研究顯示，濺射氛圍中增加氧分壓和在氧氣氛退火有助於減小hfo _ 2柵介質的漏電流。 -
Quasi - static capacitance has been measured, when drain voltage is 0v, and gate voltage changes from ? 5v to 0v, the surface peak
採用應力測試方法，獲得了algan / ganhemt漏極電流隨時間的變化。 -
In this paper, a precise cmos bandgap voltage reference which uses the difference of mos source - gate voltage to perform efficient curvature compensation is described in detail, which is compatible with standard digital cmos process
論文詳細描述了一個運用標準數字cmos工藝實現的、採用mos管的柵源電壓差進行有效的溫度曲率補償的帶隙基準電壓源電路的設計。 -
The structure of field emission triode is first simulated by magic. the tip height, tip position, tip curvature, gate aperture, and gate voltage are changed, to observe the emission current and the electron congregation
本課題首先採用magic軟體對三極體結構的尖錐場發射陰極進行了模擬計算，分別改變尖錐高度，錐尖位置，尖錐曲率半徑，柵極孔徑及柵極電壓，觀察陽極收集電流及電子束的會聚情況。
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