hardware register 中文意思是什麼
hardware register
解釋
硬存器-
We provide the structure and function of system software and hardware, discuss image attaining, division employee serial number from chest card image, then combine multiple characteristic and coding to recognize employee serial numbe, employee identity, and register check on work attendance
文中給出基於胸卡識別的?勤系統的體系結構和功能，並詳細論述了圖像捕捉、胸卡和編號的分割、以及採用多特徵抽取和編碼器結合對編號進行識別的方法，進行職工身份識別，達到?勤的目的。 -
For the real time performance need of the low speed speech compress algorithm and the asic implement of the transfer process between programs, the design is put forward in the paper, in which state registers control the cross access between operator and memory, register windows are used for the parameters transfer, and the technique of hardware controlling is used to avoid pipeline conflict, so that the main problems of the transfer process in tr600 are solved effectively
摘要針對低速率語音壓縮演算法對處理器系統實時處理復雜運算的性能要求，就程序調用過程的asic實現問題進行了對比與分析，進而提出了用層次狀態寄存器控制存取運算元對存儲體交叉訪問的方法，並結合運用寄存器窗口傳遞參數的功能，以及利用空指令硬布線處理流水線沖突的方法，有效地解決了tr600晶元中調用過程存在的主要問題。 -
The thesis details our fiscal cash register from the hardware and software
本文從硬體和軟體設計兩方面詳細介紹本課題設計的稅控收款機。 -
Its hardware design was analyzed from the master module, imported equipment modules, exporting equipment modules, data storage module, other components and the problem of the printer ’ s continuous printing from interrupted position was fixed in this course ; followed by, the software design including the operating system and the application software was discussed. the kernel of linux system was transferred to the motherboard of the novel fiscal cash register as its own operating system, in which the compilation of lcd driver and the printer driver was mainly focused on, and the application software was divided into the controlled tax software, the commercial software and power - fail protected disposal software for further discussion ; finally, the systemic reliability, security and electromagnetic compatibility were evaluated
首先硬體部分主要由主控模塊、輸入設備模塊、輸出設備模塊、數據存儲模塊等部分組成，在硬體設計中解決了發票印表機掉電續打的難題;接著對稅控收款機的軟體設計主要從操作系統和應用軟體兩個方面討論:操作系統採用的是linux操作系統，先將linux內核移植到稅控收款機主板上，著重介紹了lcd 、印表機驅動程序編寫;應用軟體分為稅控軟體、商業軟體和掉電處理程序來討論;最後，對本文設計的稅控收款機系統的可靠性、安全性和電磁兼容性等方面進行分析和研究。 -
A device or equipment making possible interoperation between two systems, for example, a hardware component or a common storage register
能夠使兩個系統之間相互運行的一種設備或裝置。例如一種硬體部件或一種公共的存儲寄存器。 -
Assist in maintaining and controlling all it assets, both hardware and software. this includes such things as an asset register and license register
記錄和管理公司所有it相關資產，包括硬體和軟體，以及所有軟體的使用證書。 -
This text introduced the work patterns and register structure of 80386 processors in detail at first, latterly expounded especially the hardware interrupt handling of windows 98 with the course to the kernel of windows 98 ; then recommended the framework of realization of highly demanding hardware board interrupt handling by revising idt to intercept interrupt handling at hardware layer, subsequently introduced the application and development of vxd technology to achieve interrupt handling overall all situations under the windows 98 platform ; finally introduced the b / s pattern network application development part of this topic, specifically introduced the jsp technology system, elaborated the communication between network application part and the hardware interrupt handling routine combined with the jni technology, and provided partial important program and corresponding commentary
本文首先詳細介紹了80386處理器的工作模式和寄存器結構，接著對windows98的內核進行了相關分析，重點介紹了windows98的硬體中斷處理過程;隨后介紹了通過修改中斷向量表以實現在硬體層截獲中斷來實現高實時性處理的框架，又介紹了windows98下虛擬設備驅動vxd技術的應用與開發，以及中斷全局處理的實現;最後介紹本課題的b / s模式網路應用開發部分，具體介紹了jsp技術體系，並結合jni技術闡述了網路應用與硬體中斷處理程序的通信，並給出部分關鍵程序及其注釋。 -
So it is convenience for different users with different hardware preserve important data. in fact, the whole system save the important data in the register table, it is a relatively safety method in only realized by software
這樣可以保證對用戶不同硬體需求的擴充方便，實際開發也採用在注冊表中保存重要信息，相對來說，這是比較安全的一種軟體實現形式。 -
Due to the development of 1c technology, now a complex system can be integrated in a chip called system on chip ( soc ). the design of soc needs new design methodologys and modeling tools. systemc is an open c + + modeling platform promoted by the open systemc initiative, which consists of a well defined set of c + + classes and a simulation kernel, supporting design abstractions at the register - transfer, behavioral, and system levels. the advantages of systemc include the ability for hardware - software co - design, the ability to exchange ip easily and efficiently, and the ability to reuse test benches across different levels of modeling abstraction
系統級晶元的設計需要新的設計方法和建模工具。 systemc是osci （ opensystemcinitiative ）組織制定和維護的一種開放源碼的c + +建模平臺，它由一個定義良好的c + +類庫及模擬內核組成，支持對系統進行寄存器傳輸級，行為級和系統級的描述。 systemc的優點包括對軟硬體聯合設計的支持，更高效和方便的進行ip交換，以及在不同的抽象模型間復用測試基準的能力。 -
With software and hardware co - design method, this paper proposes an algorithm to calculate register lifetime in programs, and the control of writing results back into rf is implemented through an enable control signal provided by instruction encoding at compile time
基於軟硬體協同設計的思想，在研究局部變量生存期演算法的基礎上，本文提出了通過編譯器指令編碼實現對硬體結構的使能控制，即控制流水輸出結果是否寫回寄存器文件，以減少對寄存器文件的寫次數，從而降低寄存器文件埠的讀寫壓力。 -
A method of inte * * cing with hardware that involves repeatedly reading a status register until the device has reached the awaited state
一種硬體交互方法，不斷讀狀態寄存器，直到設備進入等待狀態。 -
A method of interfacing with hardware that involves repeatedly reading a status register until the device has reached the awaited state
一種硬體交互方法，不斷讀狀態寄存器，直到設備進入等待狀態。 -
The serial a / d transformation and the channel isolation technology are adopted. eight - channel parallel data acquisition and test data time - sharing storage are realized. verilog hdl ( hardware description language ) is adopted to design the vxi register - based interface circuit and control circuit of each channel
以fpga （ fieldprogrammablegatearray ）為控制核心，採用串列a / d變換器和通道隔離技術，實現了8通道并行採集和測試數據分時存儲功能，利用veriloghdl （ hardwaredescriptionlanguage ）設計vxi寄存器基介面電路及各通道的控制電路。 -
Command except that it forces the use of a hardware register
命令，差別在於它強制使用硬體寄存器。 -
Command forces the use of a hardware register on systems that support it
命令強制在支持硬體寄存器的系統上使用它。
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