high performance processor 中文意思是什麼

high performance processor 解釋
高性能處理機
  • high : adj 1 高的〈指物，形容人的身高用 tall〉；高處的；高地的。2 高級的，高等的，高位的，重要的。3 高尚...
  • performance : n. 1. 執行，實行，履行；完成；實現；償還。2. 行為，動作，行動；工作。3. 性能；特性。4. 功績；成績。5. 演奏；彈奏；演出；（馴獸等的）表演；把戲。6. 【物理學】演績。
  • processor : n. 1. 〈美國〉農產品加工者；進行初步分類的人。2. （數據等的）分理者；【自動化】信息處理機。
  1. 14 lee r b, shi z, yang x. how a processor can permute n bits in o cycles. in proc. hot chips 14 - a symposium on high performance chips, august 2002

    這在以往的基本risc處理器中需要o n個指令實現，而利用最新提出的位置換，則最優的結果是o log n個指令。
  2. The system use high - performance processor and mobile communication network build up a platform with real - time data process ability and it can provide far - end information query and alarm

    該系統利用高性能處理器和移動通信網路構建具有實時數據處理能力和提供遠端信息查詢和告警服務的平臺。
  3. Through analysising the characteristics of the power system with floating neutral point deeply, the paper puts forward a new plan of single - phase to ground fault line selection on the base of s ' s signal injecton method and gives the hardware and software design. in this design, the high speed sampling and data processing is carried out through using dsp processor ; the large electrice current is drived through the application of a high - performance audio power amplifier and transformer ; the communication between host computer and detectors is realized through rs485 bus technology ; the difference multilevel frequency - selected amplifier is designed and the feeble signal of space is sampled on the base of the theory of magnetic induction ; the interface between dsp and exterior chip and rs485 interface logical is designed through using fpga ; the using of lcd module and keyboard interfacing chip makes the interface between human and machine ; the programme of host computer and detectors is designed through using blocking design method

    在本設計中，採用高速的dsp處理器，實現了對故障特徵信息的高速採集與處理;採用大功率的功放晶元與變壓器配合的方法，實現了大電流信號的驅動輸出;採用485總線技術，組建了裝置主機與多探測器之間的主從式通訊網路，實現了多干擾條件下裝置主機與多探測器的可靠通訊;設計了差分式多級選頻放大電路，採用磁感應的方法實現了對空間微弱信號的接收;利用fpga技術，實現了控制器與多外設的介面及數字信號的串並轉換;採用了先進的lcd液晶顯示模塊及鍵盤介面晶元，設計了人機信息交互的介面;採用了模塊化的軟體設計方法，開發了裝置主機及探測器的軟體程序。
  4. In chapter 5 we discuss the design of ieee754 standard fpu ( floating point unit ). processor and uart ( universal asynchronous receiver transmitter ), these cores are used in this dissertation, fpu is used for floating point complex fft processor, uart is used for fft processor " s peripheral and our test platform. in chapter 6 we discuss the design for testability, including atpg, bist and jtag method, discuss the different verification and simulation strategy in soc scale facing to different modules, build up the test platform which is used to test high performance application specified digital signal processing processor. in chapter 7 we summarize the research results and creative points, and point out the further work need to do in the future

    第五章提出了基於ieee754浮點標準的浮點運算處理器的設計和異步串列通信核的設一浙江大學博士學位論文計，提出了適合硬體實現的浮點乘除法、加減運算的結構，浮點運算處理器主要用於高速fft浮點處理功能，異步串列通信核主要用於pft處理器ip核的外圍擴展模塊以及本文所做的驗證測試平臺中的數據介面部分第六章提出了面向系統級晶元的可測試性設計包括了基於掃描測試atpg 、內建自測試bist 、邊界掃描測試jtag設計，在討論可測試性設計策略選擇的問題上，提出了針對不同模塊進行的分別測試策略，提出了層次化jtag測試方法和掃描總線法，提出了基於fpga
  5. Based on the demonstration in the project target and the technologic support, the hilss is completely constructed, which is a tightly coupled multi - processor system composed of a standard personal computer, a high - performance single chip microprocessor system and a fast - running floating point dsp system. the debugging of the outside ecu will become easier by the friendly graphical user interface, and the high - speed signal transfer through all the parts. besides, the hilss can be expanded conveniently for its modular components

    在這一系統中， pc上位機、單片機和dsp系統通過共享存儲器構成了一個緊密耦合的多處理器平臺，友好的圖形化用戶界面、高速的信息採集和控制響應、模塊化的系統功能構成為外部電控系統的調試創造了良好的開發環境，同時也為系統今後進一步的擴展奠定了扎實便利的基礎。
  6. Dual - core embedded processor has high performance, high reliability, low frequency, so, it ’ s cared by many processor chip manufacturer. more, it has good pin compatibility, design compatibility with the prior signal - core processor, so, has attract many big telecomm equipment supporters. but, it need the support from the new real time operating system which under designing

    雙核嵌入式處理器以其高性能，低主頻，高可靠性正得到許多晶元生產商的關注，它具有良好的管腳兼容性，與單板硬體設計上的與單核處理器具有良好的兼容性，得到許多電信設備製造商及嵌入式高端應用集成商的垂青。
  7. Motion control is a comprehensive subject. modern ac drive is a important embranchment in the field of motion control. however, it is difficult to rea1ize high - performance ac drive systems because induction motors are a kind of strongly - coupled nonlinear system with many variables and the torque is not easy to control. with vector control technology decoupling and torque control of ac motor are solved. the basic idea of vector control is that three - phase system is equiva1ent to two - phase system by coordinate transformation and it realizes the decoupling between field current and torque current of the stator in order to control the flux and current respectively, thus induction motor can be considered dc motor and high performance is achieved easily. with the progress of electric and electronic technology and the development of computer, high - integrated special modules and high - precision digital signal processor ( dsp ) are applied to ac drive so that vector control has been developed rapidly

    但是高性能的交流調速系統實現很困難，這是因為交流電機是多變量、強耦合的非線性系統，不易實現高性能轉矩控制。矢量控制技術則解決了交流電機解耦與轉矩控制問題，其基本思路? ?應用坐標變換將三相等效為二相，實現定子勵磁電流分量與轉矩電流分量之間的解耦，達到對交流電機磁鏈與電流分別控制的目的，交流電機等效為直流電機實現高性能調速。隨著電力電子技術的進步，計算機技術飛躍發展，高度集成的專用模塊和高精度的數字信號處理器應用於交流傳動系統中，促進矢量控制迅猛發展，日趨成熟。
  8. ( 3 ) researches the cordic algorithm and its two work modes deeply and in system, implements iterated ( gate efficiently ) cordic processor and on - line ( high performance ) cordic processor

    （ 3 ）對cordic演算法以及兩種工作模式，進行了較為深入和系統的研究。基於fpga ，實現了高資源利用率的迭代結構cordic處理器和高性能的在線式cordic處理器。
  9. Permanent magnet synchronous machine ( pmsm ) has been paid more attention in the past two decades by researcher in the motor and control system fields because of its excellent performance for example small cubage, great power density and good efficiency we can foresee the further development about pmsm and its control system with the reduce of the permanent magnet material ' s price and producing the rotor progress in the power electronics apparatus and high - speed processor and control theories.

    經過努力，其本體設計和控制方式在近二十年內得到了長足的發展，商用化的產品也已經進入到工業生產應用等各個領域。可以預見，隨著永磁材料價格和電動機製造價格的降低，電力電子器件及高速微處理器的進去，驅動系統理論研究和實踐應用的不斷完善和提高，永磁同步及其驅動系統將會得到進一步的發展和應用，在某些場合將逐漸取代現有的普通電勵磁電機及其驅動系統。
  10. It is expected that the standard will be used for a wide range of bit rate, not just low bit rate applications and that h. 263 will replace h. 261 in many applications. to realize the real time video compression, a high performance processor is necessary

    視頻數據壓縮運算量大，需要大量的存儲空間，要實現實時的視頻數據壓縮無疑需要一個高速處理器， tms320c6711dsk是ti推出的面向圖像處理的硬體平臺，其運算速度可達到900mflops （百萬指令位元組每秒） ，可用內存達16m位元組，是進行視頻壓縮的理想平臺。
  11. Since then, jeilin has developed many important core technologies such as jpeg codec, usb device controller, high - performance image processor, dsc controller, memory card interface controller, ide interface controller, tv encoder, and mpeg - 4 codec, etc. with these core technologies, jeilin has successfully promoted cost - effective solutions for customer s products such as pc camera, web camera, dsc, photo card reader and digital picture frame

    傑霖科技致力於影像與多媒體ic的設計與研發，已成功開發多種pc周邊控制晶片多媒體影音控制晶片及客戶委託之應用ic如通訊產品asic等研發。針對影像處理技術， jpeg codec壓縮及解壓縮技術mpeg 4 codec系統整合tv encoder介面技術usb 2 . 0介面技術及ide介面技術，皆有豐富的開發與整合的成功經驗，並極力推陳出新。
  12. This thesis focuses on low power research on the high performance general - purpose processor design, which is based on godson - 2 processor core. many creative methods are raised in this paper. the following is the main contributions of this thesis : 1

    本文針對當前高性能通用處理器設計，結合龍芯2號高性能通用cpu的研製，對高性能通用處理器核的低功耗技術進行研究，提出了一系列實用有效的低功耗技術和方法。
  13. This system is developed based on high performance, low cost and many controllers inside of the embedded processor, and enlarged gpio for the plat of the hardware and software. this system is applied to the high - speed numerical control carving machine. show the operate interface by lcd, input the control code from the keyboard, the data is readed from the usb interface and store that in sdram

    本系統應用於高速數控雕刻機，以lcd為人機可視化操作界面，以編碼鍵盤為操作控制部分，以嵌入式處理器s3c44b0x晶元為核心，文件數據經usb口讀取u盤中的雕刻數據文件暫存於sdram中，經嵌入式處理器進行相關演算法處理，得出相應參數傳送到fpga ，由fpga控制輸出脈沖和脈沖間延時，通過高速光耦隔離（ 2mbit / s ）后輸出，控制步進電機的運轉。
  14. In order to resolve the contradiction between real - time and arithmetic complex in the television tracking capture system, the paper designs the real - time target track processing system which is constructed by the high performance dsp chipset tms320c6416 as the core digital processor, the huge reprogrammable logic chipset cpld as the system logic control and the field reprogrammable array fpga as the image preprocessing chipset to sampled video digital image

    摘要為解決電視捕獲跟蹤瞄準系統中系統的實時性與演算法復雜性之間的矛盾，設計了以高性能的dsp晶元tms320c6416為核心處理器，結合大規模可編程邏輯器件cpld進行邏輯控制以及現場可編程門陣列fpga對採集的視頻數字圖像做預處理的實時目標識別跟蹤處理平臺。
  15. Conclusively, the sma architecture is a promising way to implement high performance processor ; the continuous optimization framework smarcof can utilize dynamic execution profiles and heuristic rules to eliminate sma performance hindrance effectively. preliminary work discussed in this thesis showed encouraging performance boost potential and application compatibility of smarcof

    綜合來說， sma結構是一個很有潛力的方向，而基於反饋信息的持續優化方式配合正確的啟發式優化規則能夠很好的挖掘sma結構的潛力，將體系結構優勢轉化為現實的執行性能。
  16. Then, the work researches multithread processor architecture based on the armp. this dissertation focused on the branch predictor of high performance processor and fetch unit of selective execution of multithread architecture

    接著，本文以armp為基礎深入了解國內外目前最先進的多線程處理器系統結構研究工作，明確了該領域研究的發展方向和研究難點。
  17. It has been an exigent task to reduce the difficulty of functional verification, cutting down the ratio of verification in the whole design duration, while assuring the coverage of functional verification when designing a high performance processor to solve this problem, the concept of random instruction testing has been introduced here. thus not only a lot of verification engineers " burdens of hand writing test is reduced, but also the influence of man - made factor in the process of testing

    如何在保證效果的同時，降低驗證工作的難度，減少驗證在整個設計周期的比率，已經成為高性能嵌入式處理器設計所迫切需要解決的一個問題。為了解決這個問題，引入了隨機指令測試的概念。這樣一來就可以大大減輕驗證工程師在晶元驗證時人為書寫大量測試的負擔，同時又可以減輕了人為因素在驗證過程中的影響，達到更好的測試效果。
  18. This paper, first, studies the performance and architecture of high performance processor pipeline, and the technology that used to deal with the correlation and interrupt in pipeline. the author takes part in study and design of pipeline of armp, which is a 32 - bit embed microprocessor

    本文首先研究了高性能處理器流水線的性能與結構以及對相關和中斷的處理等關鍵技術，作者作為設計人員參與研究並設計了32位嵌入式微處理器apmp的流水線。
  19. According to the requirement of data recording integrality, a high performance processor of arm9 series was chosen as system ’ s controller and a widely used rtos ( real - time operating system ), vxworks, was migrated

    針對系統對數據記錄的完整性的要求，選擇了高性能的arm9晶元作為系統的控制器，並移植了廣泛應用的vxworks實時操作系統。
  20. With the advancement of vlsi design and the scaling of technology, the number of high performance processor is surging. not only does the performance of the processors is scaling up complying with the moore ' s law, but also the processors are get widely adopted in all kinds of application systems

    隨著vlsi技術的高速發展，工藝水平的不斷提高，各種高性能的處理器不斷涌現，不僅僅是通用處理器的性能指標按摩爾級數遞增，在各種應用系統中，嵌入式處理器也得到了充分的發展。
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