high speed signal interface 中文意思是什麼
high speed signal interface
解釋
高速信號介面-
Based on the dsp development board, the author finishes the hardware debug about the multi - channel buffered serial port ( mcbsp ) receiving the output signal from the gps if collector and resolves the software program of the receiving buffer of the multi - channel synchronous serial data, data integration, udp datagram encapsulation and network interface driver, etc. the real - time udp datagram receiving, data frame de - encapsulation and high speed data memory are implemented, and a friend application interface with windows message is developed on the pc
基於dsp開發板，作者完成了dsp的多通道緩沖串口（ mcbsp ）接收gps中頻接收機輸出信號的硬體調試，並解決了多通道同步串口數據的接收緩沖、數據合併、 udp數據報裝幀及網路介面驅動等軟體編程。在pc端，通過mfc的網路應用開發類casyncsocket實現udp報的實時接收、數據解幀譯碼、高速存貯，利用windows消息機制開發了應用程序友好界面。 -
Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper, carried on intact summing up to the data in the system, having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram, give solution that many pieces of sdram works togetherses of realizing heavy capacity, designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus, optimize back end state machine design and urge procedure making with lower, giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices, due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal, method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo
本文首先對數字減影血管造影（ dsa ）成像系統的組成結構和數據流向進行了深入研究和分析，並對系統中的數據流向進行了完整的歸納和總結，給出了x線數字成像系統中的高速大容量數據通道的設計方案；在對sdram的控制方式做了深入探討后，給出了實現大容量多條sdram共同工作的解決方案，在此基礎上設計了大容量幀存板實現對圖象數據進行高速存儲；通過對pci總線介面的深入研究，優化後端狀態機設計和低層驅動程序開發，給出了完整的pci介面方案實現高速dma數據傳輸，完全可以滿足視頻傳輸要求；深入研究了基於大規模可編程器件的數字系統設計方法，針對通用fifo使能信號漂移、輸出數據難于建立和保持等設計難點，提出了利用fpga中的鎖相環提供多個時鐘相移的信號來提高系統穩定性的解決方案，從而實現利用fifo來協調系統各模塊之間的數據高速傳輸。 -
Through analysising the characteristics of the power system with floating neutral point deeply, the paper puts forward a new plan of single - phase to ground fault line selection on the base of s ' s signal injecton method and gives the hardware and software design. in this design, the high speed sampling and data processing is carried out through using dsp processor ; the large electrice current is drived through the application of a high - performance audio power amplifier and transformer ; the communication between host computer and detectors is realized through rs485 bus technology ; the difference multilevel frequency - selected amplifier is designed and the feeble signal of space is sampled on the base of the theory of magnetic induction ; the interface between dsp and exterior chip and rs485 interface logical is designed through using fpga ; the using of lcd module and keyboard interfacing chip makes the interface between human and machine ; the programme of host computer and detectors is designed through using blocking design method
在本設計中，採用高速的dsp處理器，實現了對故障特徵信息的高速採集與處理;採用大功率的功放晶元與變壓器配合的方法，實現了大電流信號的驅動輸出;採用485總線技術，組建了裝置主機與多探測器之間的主從式通訊網路，實現了多干擾條件下裝置主機與多探測器的可靠通訊;設計了差分式多級選頻放大電路，採用磁感應的方法實現了對空間微弱信號的接收;利用fpga技術，實現了控制器與多外設的介面及數字信號的串並轉換;採用了先進的lcd液晶顯示模塊及鍵盤介面晶元，設計了人機信息交互的介面;採用了模塊化的軟體設計方法，開發了裝置主機及探測器的軟體程序。 -
With turning the scale of asic ( appl ication specified integrated circuits ) to s0c ( system on chip ), which conunon1y is composed of mcu, specified function ip cores, memory, periphery interface etc, the ip reuse techno1ogy is very important in s0c design flow, which can realize the constructions of different levels components. the approach of configurable system, method and design f1ow for udsm ( u1tra deep sub micron ) asic, logic system design using hdl 1anguage, coding style, static and dynamic verification strategy are a1so presented in chapter 2. in chapter 3 we study the vlsi - - dsp architecture design, dense computation and high speed high performance digital signal processing unit structure, which includes high speed mac components and distributed arithmetic unit
在工程設計方法及結構化設計和高層次綜合的研究中，介紹了在深亞微米工藝條件使用的方法和asic設計流程，討論了高層次綜合的核心如何從描述推出電路構成的設計思路，針對不同目標的設計技巧討論了採用hdl語言進行邏輯系統設計的方法，給出了用vhdl語言進行代碼設計時的規范和風格，在面向soc的驗證策略討論了動態和靜態的驗證技術，提出了進行單獨模塊驗證、晶元的全功能驗證和系統軟硬體協同驗證的整體策略。 -
Based on the demonstration in the project target and the technologic support, the hilss is completely constructed, which is a tightly coupled multi - processor system composed of a standard personal computer, a high - performance single chip microprocessor system and a fast - running floating point dsp system. the debugging of the outside ecu will become easier by the friendly graphical user interface, and the high - speed signal transfer through all the parts. besides, the hilss can be expanded conveniently for its modular components
在這一系統中， pc上位機、單片機和dsp系統通過共享存儲器構成了一個緊密耦合的多處理器平臺，友好的圖形化用戶界面、高速的信息採集和控制響應、模塊化的系統功能構成為外部電控系統的調試創造了良好的開發環境，同時也為系統今後進一步的擴展奠定了扎實便利的基礎。 -
The hip interface of dsp is set to universal i / o port, / bio used as handshake signal line, it can transmit merger result to the adjudicate dsp high speed. thus it simplified the complexity of the interface circuit
將dsp的hpi介面設置為通用fo埠， / bio作為握手信號線，使融合結果能夠高速地傳輸給判決ds屍，從而簡化了介面電路的復雜性。 -
The broadband signal is generated by high speed d / a, and the logical control of the system such as the interface timing control of ide or sdram is implemented by fpgas
採用高速d / a實現輸出信號的高寬帶，採用多片fpga完成整個系統的時序邏輯控制，比如ide介面時序的實現， sdram的操作等。 -
This thesis researches the design and implementation of underwater high - speed multi - channel data acquisition and processing system. there are some contents to be presented including designing a set of noise signal generator ; design and implementation of underwater nosie high - speed multi - channel data acquisition and processing system ; programming the windows 2000 device driver cl pci and usb with ddk2000 ; programming user interface of the control of the acquisition and display of the image with vc + + 6. 0
本論文對高速多通道採集和處理系統的設計和實現進行了研究，論文的主要研究工作包括：設計一套模擬噪聲源；根據水下目標輻射噪聲的檢測和識別要求進行了高速多通道採集和處理系統的設計和實現研究；完成了相應的pci 、 usbwindows2000驅動程序的開發；使用vc + + 6 . 0編寫了採集控制和波形顯示界面。 -
Durning study of the subject, realizating comprehensive rf front - end simulator and starfabric data - distributed interface module in hardware. moreover, it elaborates the achievement of a system of data - distributed based on starfabric technology, by designing hardware modules, multi - entrance high - speed switch module, signal processing module and pc terminal
在課題研究期間，在硬體上完成了高速數據分發系統中的綜合射頻前端模擬器和starfbric數據分發介面板設計及實現，並用所設計的硬體模塊，加上多埠高速交換模塊、信號處理模塊和pc終端實現了一個基於starfabric技術的高速數據分發系統。 -
The designed base - station and substation ( dolly controler ) both have infrared interface which can beam and receive infrared signal. by accreting the beaming power, one base - station can control 64 set of substations at mostthe base - station and master pc computer is connected with rs - 485 interface, this fullfils the demand of long - distance and high - speed commnication
通過增大發射功率，一臺基站最多可控制64臺從站。基站與上位pc機之間採用rs - 485介面進行通信，可以滿足遠距離高速通信的要求。 -
It belongs to multi - carriers modulating technology, and its most remarkable character is the high - speed transmitting ability as well as the excellent resistibility to interface of signal interval and decline of channel selectivity
它屬于多載波調制技術，其最大的特點是傳輸速率高，對碼間干擾和通道選擇性衰落具有很強的抵抗能力。 -
Then the difference of data transmission speed between inside and outside of current cmos chips has been a bottleneck influencing the performance of computer systems. lvds ( low voltage differential signaling ) is an international common interface sdandard that applied to high speed signal transmitter
低電壓差分信號lvds是一個用於高速信號傳輸的國際通用介面標準，同時具有高速度、低噪聲、低功耗和低成本的突出優點。 -
Due to high speed of the maglev, it demands rapidity and reliability of the communication interface between gap sensor and suspense control system. thus a multi - serial asynchronous communication interface based on rs - 485 is designed. it transmits one signal on each unattached channel and has redundant structure, which meets the requirement of rapidity and reliability
針對磁懸浮列車，對間隙傳感器與懸浮控制器之間通訊介面的實時性和可靠性高要求特點，本文還設計了多路rs - 485串列異步通訊介面，每路通道傳送一路數據，各路通道之間相互冗餘，滿足了系統對實時性與可靠性方面的要求。 -
Chapter one introduces the recent development of usb2. 0 and the overall architecture of transceiver interface ; chapter two proposes the design flow and design style ; chapter three presents the whole system and module partition ; chapter four emphasizes on the dual - mode transmitter circuit, and gives out the simulation waveforms ; chapter five focuses on the design of over - sampling receiver and dll ( delay locked loop ) module ; chapter six designs the band - gap reference circuit. in the end, it concludes the design, and estimates the trend of usb. the dissertation is emphasized on dual - mode transmitter architecture, implementation of high speed dll using dba ( digital - based analog ) technology and a new design methodology for complex digital modules in mixed - signal circuit
本文第一章介紹了usb2 . 0的發展現狀和收發器介面晶元系統；第二章介紹了該晶元的設計流程和風格；第三章介紹了該介面晶元的總體構架以及模塊劃分；第四章著重介紹雙模發送器電路設計並給出了模擬驗證波形；接下來第五章分析了過采樣接收器的設計並對其中的dll （ delaylockedloop ）模塊設計進行了詳細的分析；第六章介紹了本晶元內置的基準電壓源的設計；最後對本文的設計一個總的回顧和總結，並展望下一代usb的發展方向。 -
The paper introduces the development trend of present application of plastic fibers in digital audio signal transmission, and in multimedia video & audio transmission and digital home networks, high speed plastic fiber transmission interface in the future
摘要:本文介紹塑膠光纖現在應用在數碼音頻訊號傳輸，以及未來在多媒體影音傳輸及數碼家庭網路，塑膠光纖高速化傳輸介面發展趨勢。
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