input buffer 中文意思是什麼

input buffer 解釋
輸入緩沖器
  • input : n. 1. 【電學】【自動化】輸入；輸入端。2. 輸入電路，輸入信號，輸入功率[電壓]。3. 放入物，投入的資金。vt. ,vi. 把（數據等）輸入計算機。
  • buffer : n 1 【機械工程】緩沖器，緩沖墊；阻尼器，減震器；消聲器。2 【化學】緩沖，緩沖劑。3 緩沖者；緩沖物...
  1. Based on vc and opengl software platform, as a part of integrate planar mechanism analysis and simulation cai, the mechanism theory has been adopted to analysis the movement trace and profile of linkage ; adopt oriented object method to capsulate the class module. each corresponding class module complete parameter storage and process ; adopt message - map, message - trigger to organize the programming and response the user " s input ; use the document - view structure of the visual vc + + mfc class foundation as the basis of the programming architecture to complete those functions. use oriented object method to product the following class module : control class, render class, document class, mechanism class and other classes ; adopt opengl library to draw the three dimensional graph based on the result of mechanism analysis ; use model transforming, lighting, material, color, frame - buffer, display - list, graphics - component combine etc to draw the three - dimension mechanism and make the simulation of linkage has high reality

    本文敘述了平面連桿機構運動分析和可視化模擬的理論演算法及其編程實現方法，基於微機vc平臺，採用opengl圖形庫編程，利用面向對象的方法對機構進行功能封裝，利用vc + +的文檔視結構作為最基本的窗架，生成並控制三維繪制類、文檔類、主窗口類和一些輔助類，利用windows平臺的消息映射、事件驅動來組織程序運行和響應用戶反饋，利用機構分析得出坐標數據驅動opengl庫繪制三維機構圖形。
  2. If the node is at, or near to, ground then a grounded guard ring will be appropriate, if it is at some other potential it may be necessary to use a high input impedance buffer amplifier, with its input connected to the node, to force the guard ring to the node potential

    如果被保護的節點的電位是（或接近）零電位，採用地線保護環最為合適；如果節點電位是其他值，那麼可以用高輸入阻抗放大器組成緩沖器，輸入端連接該節點，輸出端連接保護環。
  3. Because of block in head of line ( hol ), input buffer strategy make the whole switch system performances declining drastically at heavy oflbred load, and some improvements of input buffer strategy are put forward to overcoming tlle head of line block. virtual output queues ( voq ) is chosen as input buffer strategy. dpa and ilqf ce1l scheduling algorithms for voq are silllulated

    由於輸入緩存的隊頭阻塞使得高負載條件下輸入緩存策略的交換系統各方面性能急劇下降，由此提出了克服輸入緩存隊頭阻塞的改進方法，最後本文決定選用虛擬輸出隊列（ voq ）的輸入緩存策略，並且研究了與虛擬輸出隊列相對應的ilqf （最長隊列優先）和dpa （對角線優先）信元調度演算法，為交換系統的asic設計提供依據。
  4. If a parity error occurs on the trailing byte of a stream, an extra byte will be added to the input buffer with a value of 126

    如果在流的尾位元組上出現奇偶校驗錯誤，將向輸入緩沖區添加一個值為126的額外位元組。
  5. If there are too many bytes in the input buffer and

    如果輸入緩沖區中的位元組數太多，並且
  6. Reads all immediately available bytes, based on the encoding, in both the stream and the input buffer of the

    對象的流和輸入緩沖區中所有立即可用的位元組。
  7. The end of file character was received and placed in the input buffer

    接收到了文件結束字元並將其放入了輸入緩沖區。
  8. By testing several groups of data, it is well known that the number of the customers in the output buffer is not too much even if the input probability of the three queues is very large. so we must try our best to design the input buffer when we optimize cioq program

    測試幾組數據可以看出，即使三個隊列的來到概率很大時，輸出端緩沖庫中滯留的顧客也不是很多，因而在優化cioq設計方案時，要盡量設計好前端即輸入端緩沖庫。
  9. The perfonnances of two main space divided switch fabrics including crossbar and multistage intercon11ect network ( min ), including extend muitistage i11terconnect network ( emln ) are study careful1y. the result of ana1ysis a11d stilllulation of buftbr strategy including input buffer and output buffer explain why using input buffer

    本論文將定量的分析和模擬空分交換結構和對應的調度演算法，深入的了解crossbar利min （包括emin ）空分交換系統各方面的性能，分析利模擬輸入緩存和輸出緩存的緩存策略。
  10. 3 ) design switch system using eda based on the result of a11alysis. because the function of switch system is very complicated, some modules are designed by schematics directly, most modules are designed by verilog hdl using eda technology, synthesized by the synopsys software. at last a high speed atm switch system is designed, including voq as input buffer strategy dpa cell scheduling algorithm and crossbar switch fabric

    在前面分析的基礎上根據目前的條件，對一個空分交換系統各模塊進行前端設計和模擬，由於交換系統的功能復雜，我們一部分將採用直接畫原理圖的方法進行設計，大部分將採用集成電路設計自動化的方法進行設計，即採用硬體設計語言verilog ? hdl進行設計，用synopsys軟體對設計進行綜合，生成線路圖，然後作門級電路模擬。
  11. There is either no room in the input buffer, or a character was received after the end - of - file character

    輸入緩沖區空間不足，或在文件尾（ eof ）字元之後接收到字元。
  12. If the input buffer becomes full, the rts line will be set to

    如果輸入緩沖區已滿， rts行將被設置為
  13. The index position of the character in the input buffer

    該字元在輸入緩沖區中的索引位置。
  14. Input buffer available enabling simultaneous printing and data receiving

    約20kb輸入緩沖器供同時接收與列印之應用
  15. Value is removed from the input buffer. by default, the

    值將從輸入緩沖區中被移除。
  16. The contents of the stream and the input buffer of the

    對象的流和輸入緩沖區的內容。
  17. The number of bytes in the internal input buffer before a

    事件激發前內部輸入緩沖區中的位元組數。
  18. A character was received and placed in the input buffer

    接收到了一個字元並將其放入了輸入緩沖區。
  19. The index position of the surrogate pair in the input buffer

    該代理項對在輸入緩沖區中的索引位置。
  20. An input buffer overflow has occurred

    發生輸入緩沖區溢出。
分享友人
分享到 Line

分享到臉書