instruction memory 中文意思是什麼

instruction memory 解釋
指令存儲器
  • instruction : n. 1. 教育，教導。2. 教訓，教誨。3. 〈 pl. 〉 指令，訓令，指示，細目。
  • memory : n. 1. 記憶；記憶力；【自動化】存儲器；信息存儲方式；存儲量。2. 回憶。3. 紀念。4. 死後的名聲，遺芳。5. 追想得起的年限[范圍]。
  1. In chapter two, using the instruction of simd and memory in pentium to optimize idct, motion compensation and recompose frame and improving executive speed of idct to utilize vlcd and iq

    在第二章中，使用intel處理器中的simd指令和內存優化技術對idct （反離散餘弦變化） 、運動補償和圖像重組等解碼過程進行優化實現。
  2. The instruction format indicates that there can be as many as 2 [ 4 ] = 16 different opcodes, and up to 2 [ 12 ] = 4, 096 ( 4k ) words of memory can be directly addressed

    這樣的指令格式說明有16 （ 2的4次方）種不同的操作碼和4096 （ 2的12次方）字大小的內存存儲空間能被直接尋址。
  3. There are five parts in powerpc603e ? microprocessor : integer execution unit, floating point unit ( fpu ), instruction ( data ) cache, bus interface unit and memory manage unit. the instructions are executed with pipeline way

    Powerpc603e微處理器系統由定點執行單元、浮點單元、指令（數據） cache 、總線介面單元、存儲管理單元組成，以流水和超標量方式執行指令。
  4. It has five parts, such as integer execution unit, floating point unit ( fpu ), instruction cache, bus interface unit and memory manage unit. the instructions are executed with pipeline way. the instruction set and i / o signals are compatible with powerpc

    它由定點執行單元、浮點單元、指令cache 、總線介面單元、存儲管理單元組成，以流水和超標量方式執行指令，指令集和介面時序兼容powerpc ，是典型的risc微處理器結構。
  5. It is designed for embedded applications with the following features : separate instruction and data caches ( harvard architecture ), 5 - stage pipeline, hardware multiplier and divider, interrupt controller, 16 - bit i / o port and a flexible memory controller. new modules can easily be added using the on - chip amba ahb / apb buses. it has flexible peripheral interfaces, so can be used as an independent processor in the board - level application or as a core in the asic design

    它遵照ieee - 1745 （ sparcv8 ）的結構，針對嵌入式應用具有以下特點：採用分離的指令和數據cache （哈佛結構） ，五級流水，硬體乘法器和除法器，中斷控制器， 16位的i / o埠和靈活的內存控制器，具有較強的異常處理功能，新模塊可以輕松的通過片上的ambaahb / apb總線添加。
  6. At the beginning of each instruction cycle, the cpu fetches an instruction from memory

    在每一個指令周期的開始， cpu從內存中取一條指令。
  7. Additionally, a new address translation mechanism and related physical memory management algorithm are presented and analyzed, which hybrid the segment and segment - page addressing. object - oriented instructions are one of the features of jvm instruction set

    另外，文中還提出了一種直接段式和間接段頁式結合的尋址策略和地址轉換技術以及相關物理存儲器的管理演算法，並對這些技術進行了全面的性能評價。
  8. An instruction in machine language generally tells the computer four things : ( 1 ) where to find one or two numbers or simple pieces of data in the main computer memory ( random access memory, or ram ), ( 2 ) a simple operation to perform, such as adding the two numbers together, ( 3 ) where in the main memory to put the result of this simple operation, and ( 4 ) where to find the next instruction to perform

    機器語言中的一條指令通常告訴計算機4件事情： （ 1 ）到計算機主存儲器（隨機訪問存儲器）的哪個位置去找一或兩個數字或者簡單的數據段； （ 2 ）要執行的一個簡單操作，例如將兩個數字加起來； （ 3 ）將這個簡單操作的結果存放在主存儲器的什麼位置；以及（ 4 ）到哪裡找要執行的下一條指令。
  9. Language teachers should be aware of the priority in vocabulary instruction and had better not overburden students ' memory

    首先詞匯教學的內容要重點突出，循序漸進，不能使短時記憶超負荷。
  10. The most common analysis is data dependence analysis, which is to determine the instructions that use the variable ( register or memory location ) modified by another instruction

    最通常的分析是數據依存性分析，它用來確定指令使用的變量（寄存器或內存位置）是否被另一條指令修改。
  11. Finally, by using hardware / software co - evaluation method to calculate the memory space the cpu cycles used and the gates that the extended instruction added, the performance of the whole system is analyzed

    最後，通過軟體上統計存儲空間和運行時間，硬體上對比添加指令硬體單元前後的綜合門數的軟硬體協同評估方法分析了添加指令后的系統性能。
  12. Many animals have memory, and are capable of instruction.

    許多動物都能記憶，並可以被教化。
  13. Memory protect privileged instruction

    記憶保護特權指令
  14. In this dissertation, the hardware / software co - design flow and ac3 decoding algorithm is analyzed and the ac3 audio decoding on the virgo risc - core. then the extended instruction is added to lessen the cpu cycles used and to reduce the memory space used by the decoding program

    其次，本文在分析軟硬體協同設計流程和ac3解碼演算法以及risc核virgo上實現ac3音頻解碼的基礎上，擴展指令集增加特殊指令減少了ac3解碼的時間和解碼程序佔用的空間。
  15. The filter in bpf was implemented by a pseudo machine, which consists of an accumulator, an index register, a scratch memory store, and an implicit program counter. bpf can be directly programmed via ioctl system call and the pseudo machine instruction set, it can also be programmed by using libpcap function library, which can access many kinds of packet capture facilities provided by oses ( bpf is the important one in them )

    Bpf的過濾器是由假想的過濾器虛擬機實現的，對bpf的編程，可以通過ioctl系統調用和過濾器虛擬機的指令集來直接編程，也可以通過libpcap提供的庫函數來編程，它能訪問許多種操作系統內核提供的包過濾設施（ bpf是其中重要的一種） 。
  16. 3 thoroughly reviewed memory bandwidth requirement of sma processor and difference of various instruction fetch policies. to improve cache performance under sma model, the paper introduces hardware software co - operative optimization

    3針對多線程模式下訪存負荷加重的問題，為sma模型設計了軟硬體協同預取機制，並為sma模型設計了cachefilter來消減無效預取。
  17. Instruction allocates the requisite amount of memory and performs any format conversion required to convert the string literal from the form used in the file to the string format required at runtime

    指令分配必需的內存量並執行將字元串從在文件中使用的形式轉換為在運行時要求的字元串格式所需的任何格式轉換。
  18. We use an address symbolic value propagation algorithm to derive possible address set that might be accessed by a memory instruction

    我們通過一種值預測及傳播演算法檢測存儲器指令數據相關。這種方法有助於提高與存儲器訪問相關的指令的執行效率。
  19. When you view the breakpoint properties, this breakpoint appears as an address breakpoint with a memory location corresponding to the next executable instruction in the function

    查看斷點屬性時，該斷點顯示為一個地址斷點，這個地址斷點具有一個與函數中下一個可執行指令相對應的內存位置。
  20. The instruction fetch is a common operation for each instruction, and consists of reading an instruction from a location in memory

    取指令對于每個指令來說都是個普通操作，它包括從內存單元中讀指令。
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