instruction unit 中文意思是什麼

instruction unit 解釋
指令部件
  • instruction : n. 1. 教育，教導。2. 教訓，教誨。3. 〈 pl. 〉 指令，訓令，指示，細目。
  • unit : n 1 個體，一個，一人。2 （計值、組織、機構）單位；單元；小組，分部；【軍事】部隊；分隊。3 【機械...
  1. Besides tt & c transponder, the power support for pico - satellite also covers cmos camera, data processing unit and energy subsystem, by connecting and charactization which, full course from modulation and demodulation of instruction data to feedback of image data, wireless long - range transmission and the feedback of sidetone signal could be achieved

    4 、整個衛星的電系統除了通信一體機外，還包括cmos相機和數據處理單元以及能源分系統。具備了這幾部分，對系統聯試，實現了從指令信號的調制解調和圖像信號的返回的全過程，並且可通過遠距離的無線傳輸。
  2. Jx5 is a complex microprocessor, which contains cache, microcode rom, instruction prefetch unit, instruction decode unit, integer unit, mmx unit, floating point unit, page unit, bus unit, dp logic, apic and so on. it is very difficulty to test a such complicated microprocessor and receive anticipative fault coverage ratio. so, we must add dft in cpu ’ design

    Jx5微處理器是一款結構異常復雜的微處理器，它的內部包含有: cache 、微碼rom 、指令預取部件和動態分支預測部件、指令譯碼部件、整數部件、多媒體部件、浮點部件、分段和分頁部件、總線介面部件、雙處理器介面部件、可編程中斷控制部件等。
  3. The author elaborates autonomous learning categories, such as brainstorming, role - play, case studies, situated learning and so on. then the author designs a synthetical e - learning model that includes establishing unit objectives, problem driven ; creating situation, learning method instruction ; self exploring, discovering problem ; collaborative inquiry in group, communication among group ; teacher instructing, communication on web ; solving problems, constructing meaning ; forming works ; summary and evaluation

    論述了頭腦風暴、角色扮演、案例研習、情景化學習等自主學習的實踐類型，嘗試設計了一種包含確立單元目標、問題驅動；創設情境、學法指導；自主探索、發現問題；小組協作探究、組間交流；教師指導、網上交流；解決問題，意義建構；形成作品；總結評價八個環節的綜合網路學習模式。
  4. There are five parts in powerpc603e ? microprocessor : integer execution unit, floating point unit ( fpu ), instruction ( data ) cache, bus interface unit and memory manage unit. the instructions are executed with pipeline way

    Powerpc603e微處理器系統由定點執行單元、浮點單元、指令（數據） cache 、總線介面單元、存儲管理單元組成，以流水和超標量方式執行指令。
  5. It has five parts, such as integer execution unit, floating point unit ( fpu ), instruction cache, bus interface unit and memory manage unit. the instructions are executed with pipeline way. the instruction set and i / o signals are compatible with powerpc

    它由定點執行單元、浮點單元、指令cache 、總線介面單元、存儲管理單元組成，以流水和超標量方式執行指令，指令集和介面時序兼容powerpc ，是典型的risc微處理器結構。
  6. 7. no parts and components or complete power unit warranty will be delivered if gear shaft seize, cylinder scraping or moving friction pad are seriously worn out, resulting in damaging relevant parts or complete power unit, due to lack of oil insufficient engine oil or failure of engine oil or improper use of engine oil following engine instruction

    因缺油機油量不足機油失效或未按發動機使用說明書規定牌號使用機油，導致咬軸抱軸拉缸或各運動摩擦付嚴重磨損，而損壞相關零部件或導致整機毀壞的，相關零部件或整機不給予保修。
  7. Each unit is extracted from the circuit, and is analyzed detailedly in framework, configuration and design approach. the instruction system of c9821 is unscrambled and then the instruction decode algorithm are obtained. the complete program of c9821 including basic arithmetic and root square operation is realized

    在軟體方面，破譯了c9821的指令系統，分析了指令譯碼電路的設計技術，分析了計算器內bcd碼的四則運算及開方運算演算法，得到了實現c9821全部功能的程序，掌握了該計算器的程序設計方法。
  8. After all logic events have been completed, the control unit initiates the next instruction fetch.

    在所有的邏輯事件完成之後，控制器再次啟動下一步指令的讀取。
  9. The part of execution in which an operand or instruction is read from main stora ge and written into a control unit or arithmetic unit register

    執行過程中的一個階段所需的時間，在此期間，計算機從主存儲器中取出指令或操作數，並將其存入控制器或運算器的寄存器中。
  10. Design the data path of the risc 51 ip core. emphasis on the arithmetic logical unit ; 3. design the control path of the risc 51 ip core to make the risc 51 ip core ' s instruction set compatible with mcs51 microcontroller ; 4

    （ 3 ）設計risc51ipcore控制通路，實現risc51ipcore內部指令與原mcs51指令系統的完全兼容，具體設計原mcs51指令與risc結構51核指令的轉換過程，及正確的指令時序。
  11. In a computer, a functional unit that interprets and executes instructions. note : a processor consists of at least an instruction control unit and an arithmetic and logic unit

    計算機中，解釋並執行指令的一種功能單元。注：處理器至少包含有一個指令控制器和一個算術與邏輯運算器。
  12. In order to probe the effects of spbi on students " mathematical cognition, this study focused on two instruction experiment ( part iii ), one was. called unit - theme - situation experiment which created problem situation according to a unit theme ; the other one was called mini - situation experiment which created problem situation according to individual class. the following hypotheses were examined : 1. students receiving spbi will perform significantly better than students receiving instruction traditionally on tasks assessing problem - posing

    為了驗證上述假設，檢驗spbi實驗的效果，我們開發了一種評估工具，稱為認知評估工具（ cai ） ，並針對不同的實驗內容分別設計了兩個作業： 「作業一（ task ） 」用於檢查「單元情境問題教學」的效果， 「作業二（ task ） 」用於檢查「微情境問題教學」的效果。
  13. A basic or fundamental unit, often referring to the lowest of a machine instruction or lowest unit of language translation

    一種基本單位或基礎單位，常常指機器指令的最低一級或語言翻譯的最低的單位。
  14. Id instruction decoder. this unit is capable of decoding up to 3 instructions per cycle

    命令解碼。本單元每循環能解三條指令。
  15. In response, the packet unit concatenates data words of an instruction sequence into contiguous blocks

    行為上，封裝單元連接指令串中的資料成為一個連續的區塊。
  16. Carry out inspection and site operation activities of the water and waste water treatment unit and other utility facilities of the complex pursuant to the instruction of the shift supervisor

    在值班長的領導下，負責水處理和廢水處理以及其它公用工程設施的巡迴檢查及現場操作。
  17. The blueprint of instruction fetch unit is presented and its performance is evaluated with theory model and simulation. and the fetch strategy and parameter are optimized based on above evaluation

    文中提出了取指部件的設計原理而且採用理論模型和模擬方法對它進行了性能評價，利用評價結果優化了取指策略和參數設置。
  18. In order to solve the problems about unfixed instruction length, stack - orientation and addressing virtualization in jvm instruction set, the instruction fetch unit, stack cache and mechanism of address translation in java chip system are studied

    為了解決java虛擬機指令系統中指令不定長、面向堆棧和地址虛擬化等問題，本文研究了java晶元中取指部件、堆棧緩沖部件和地址轉換機制以及相應物理存儲器的管理等關鍵技術。
  19. Icu instruction control unit

    指令控制單元
  20. Based on the ( program counter ) pc arbitrage strategy of multi - path execution, designing fetch instruction unit suit for selective dual path execution. the dissertation work plays a great significance for studying the high performance microprocessors

    6 、設計分析適合選擇雙路徑結構的取指部件；通過研究多路徑執行中的pc仲裁機制，設計適合雙路徑執行結構的取指部件。
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