logic address 中文意思是什麼
logic address
解釋
邏輯地址-
The key to the fft algorithm is the design of butterfly computation and that of the address logic. the whole schema is designed in the top - down design flow and described in the vhsic hardware description language ( vhdl ), basing on these, we do our research on reconfigurable technology. the result indicates that the data processing ability of reconfigurable system improved greatly
結果表明，可重構系統在數據處理能力方面比以往的系統有了很大的提高，本設計實現的fft重構處理器可工作於60mhz下，完成一個16點fft需要132個主時鐘周期，完成32點fft需要324個主時鐘周期，而且具有一定可重構性，可以方便地將其運算點數進行擴展，或將其他的圖像處理演算法在實時處理系統中實現。 -
This software system of chip simulation ' s main function is simulate the main logic circue chips, 8088cpu, memory, registers, data _ bus, address _ bus, control _ bus and other chips. this function is based on the object - oriented technology, construct the chip object by the chip classes that we defined. because this system need to simulate the detail function of computer hardware, so this system simulate the 8088cpu ' s order system, support the basic compile languages. one of the feture of this system is the simulation of a static memory, the room of the memory can be configured by testers from 1k to 64k
由於本系統在模擬過程中需要完全模擬計算機硬體的工作原理，因此本系統還模擬了8088cpu的基本指令系統，支持基本的匯編指令，在實驗過程中可以由實驗者輸入相應的匯編指令以執行操作，並查看各晶元器件的引腳參數變化情況。本系統模擬的一個特點是動態模擬了存儲器的大小，存儲器容量可以由實驗者根據需要自己設置，范圍從1k到64k 。 -
This model manages remote invokes through event driving, and supports two asynchronous invoke model such as asynchronous call back and polling ; the model uses router as message " store - forward " mechanism, and guarantees time independent invoke of loosely coupled application ; the model extends the traditional corba addressing way, defines a kind of logic object address, which can support object migration of loosely coupled application and increase transparency of object location ; the model also defines object group address, which supports message multicast and implements " i - to - n " communication model
該模型採用事件驅動的方式管理遠程調用，支持異步回調和異步輪詢兩種異步調用模式；模型採用路由代理作為消息的「存儲-轉發」機制，保障了松耦合應用的時間無關調用的需求；模型擴展了傳統corba的尋址方式，定義了邏輯對象地址，能夠支持松耦合應用的對象遷移，提高了對象定位的透明性；模型還定義了對象組地址，支持消息組播，實現了「一對多」的通信模式。 2 -
Peripheral devices in embedded systems are often connected to the mcu as memory - mapped i / o devices, using the microcontroller ' s parallel address and data bus. this results in lots of wiring on the pcb ' s to route the address and data lines, not to mention a number of address decoders and glue logic to connect everything
由於并行總線擴展時連線過多，外圍器件工作方式各異，外圍器件與數據存儲器混合編址等，都給單片機應用系統設計帶來布線復雜，線路板面積大，易引起emi和esd干擾等困難，這在一些比較復雜的應用系統是難以接受的。 -
And achieve the real - time reconstruction of linux kernel schedule mechanism and small granularity timer by studying the real - time schedule policy edf and rm. meanwhile, the thesis analyses the method of linux schedule mechanism and double kernel mechanism. research and achieve the quicklaunch mechanism in embedded qt, aimed to the demand of embedded system to embedded gui. it is based on mpc5200 environment, so i also describe the embedded linux system about mpc5200 and achieve the logic address and function design of hardware and construct the development environment of software
研究了實時調度策略edf和rm ，結合linux定時器原理，實現了實時化改造linux內核調度機制和細粒度定時器，有效提高了linux系統的實時性，並詳細分析了linux調度策略的實現和雙內核實時化改造機制。針對嵌入式系統對嵌入式gui的要求，分析並實現了基於嵌入式qt的quicklaunch機制。本文的研究工作都是基於mpc5200嵌入式系統開發基礎之上，所以本文又對基於mpc5200的嵌入式linux系統設計進行了描述，實現了硬體的邏輯地址和功能設計以及軟體開發環境的搭建。 -
The system controlling logic, multiplexing data bus and multiplexing address bus have been designed. the simulations have passed
完成了系統的控制邏輯、數據總線復用和解碼部分的地址復用器的設計，模擬並通過。 -
When the selection of the routine is based instead on more complex logic, such as the state of the resolution of an l3 - to - l2 address mapping, the routine used at any time depends on external events that cannot be predicted
當常式的選擇被替代在比較復雜的邏輯，像是決定l3 -到- l2地址映射狀態的時候，在隨時被用的常式依靠外部事件，那是不可預測的。
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