memory hardware 中文意思是什麼
memory hardware
解釋
存儲器硬體-
Of course since rendering is done by the blender rendering engine in core memory and by the main cpu of your machine, a graphic card with hardware acceleration makes no difference at rendering time
當然，由於渲染是在主存和cpu上進行的，故帶硬體加速的顯卡對于渲染時間的縮短並沒有幫助。 -
Fittings dept. : the spectacle fittings has novel style and complete breed whose main material are brass, cupronickel, phosphor copper, nickel, mangansese alloy, aluminium magnesium alloy, stainless steel, memory metal and other kind of hardware goods fittings and so on
配件部：眼鏡配件款式新穎品種齊全，主要材質有：黃銅、白銅、磷銅、鎳、錳合金、鋁鎂合金、不銹鋼、記憶金屬及其它各類五金製品配件等。 -
In the past thirty years, digital protection is very popular in the electric power system and come to replace the usual protective devices gradually, for its hardware ' s high integration, resisting interference and software ' s high intellection, easy operation and memory
在30年來的發展過程中，微機保護以其硬體的高集成度、抗干擾性和軟體的強大智能作用、強有力的運算能力和記憶功能，而形成一股取代各類常規保護不可阻擋的趨勢，成為電力系統的首選保護。 -
In the hardware design, the paper completes modules ’ design like outside memory, patulous a / d, patulous d / a, rs232 communication, ecan communication, led control, keyboard control, distant control, emulation, reset, logic voltage switch, dsp supply power regulate and ac - dc power circuit, as well as room layout design like anterior panel, back panel etc. and dsp transfers data with peripheral equipments except outside memory using serial ports. besides, the whole circuit is configured in interrupt response. thus, it can meet system demand as well as take full advantage of tms320f2812 ’ s hardware resource. in the software design, the paper finishs programs like the interface programms intercommunicates with people, the distant control program, ad and da modules ’ control program, in addition, the paper select the velocity and acceleration state - feedback algorithm and is written in the program. the software design uses dsp integrate exploiting environment named ccs2. 2 of ti inc. as software instrument, and programs with the combination of c language and assembly language. moreover, in order to maintenance or modify the software expediently and shorten software ’ s exploitation time, the design adopt software modularization technique. finally, some air cylinder experiments are carried out to proved that the pneumatic controller is very practical
在硬體設計中，本文完成了片外存儲器擴展、 a / d擴展、 d / a擴展、 rs232通信介面、 ecan通信總線介面、液晶顯示控制、鍵盤控制、遠程控制、模擬、復位、邏輯電平轉換、 dsp工作電源校正電路和ac - dc電源等模塊設計以及控制器前面板、後面板等的空間布局設計。其中dsp與除外部存儲器的外圍設備之間的數據傳送全部採用串口通信，同時系統電路配置成中斷響應方式，這樣既滿足了系統要求，又充分利用了tms320f2812的硬體資源。在軟體設計中，本文完成了人機界面功能模塊、遠程控制模塊、 ad擴展模塊、 da擴展模塊、速度和加速度狀態反饋的控制演算法的程序設計。 -
Digital image processing consume a large amount of memory and time commonly. basing on the advantage of fpga, the paper design harware module by hdl ( hardware language ), i. e., some function is achieved by les ( logic element ) of the fpga. the real - time of digital image processing is achieved by this. the sample and display of digital image is the important part. so, the paper mainly design the sample and desplay module. the sample card is designed and it ’ s word mode is configured according china ’ s cvbs ( composite video bar signal ). for acquiring the image and storing it correctly to sram, the paper design the sample - control module. the sample module can work correctly using least time. the reliability and real - time achieve the reference. according the vga principle and scheduling of the ths8134, the paper design a vga - control module by hdl. firstly, the control signal is synthesized secondly, the horirontal and vertical synchronization signals is synthesized according to the vga interface standard
圖像處理的特點是處理的數據量大，處理非常耗時，為實現數字圖像的實時處理，本文研究了在fpga上用硬體描述語言實現功能模塊的方法，通過功能模塊的硬體化，解決了視頻圖像處理的速度問題。圖像數據的正確採集和顯示輸出是其中的兩個重要的模塊，因此，本文主要完成了圖像數據的採集和顯示輸出的設計。本文設計了採集卡，並要對其工作模式進行了配置和編寫了採集控制模塊，在採集控制模塊的控制下，將數字圖像數據正確無誤的存儲到了sram中。 -
Wiglaf s hardware description seems comically quaint in a time when cpus run at more that 1 ghz - not to mention hundreds of megabytes of memory and tens of gigabytes of hard drive space
在cpu能以超過1 ghz運行的時候， wiglaf的硬體描述似乎有些離譜這還沒算上幾百mb的內存和幾十gb的硬盤空間呢。 -
The hardware of the monitoring system mainly consists of the dsp controller, nonvolatile memory, led, clock management, keyboard interface, sci communication units and can communication units
系統的硬體部分主要包括了dsp微處理器的基本外圍電路、非易失性存儲、 led顯示、時鐘管理、鍵盤介面，以及sci通信和can通信等單元電路。 -
Based on the dsp development board, the author finishes the hardware debug about the multi - channel buffered serial port ( mcbsp ) receiving the output signal from the gps if collector and resolves the software program of the receiving buffer of the multi - channel synchronous serial data, data integration, udp datagram encapsulation and network interface driver, etc. the real - time udp datagram receiving, data frame de - encapsulation and high speed data memory are implemented, and a friend application interface with windows message is developed on the pc
基於dsp開發板，作者完成了dsp的多通道緩沖串口（ mcbsp ）接收gps中頻接收機輸出信號的硬體調試，並解決了多通道同步串口數據的接收緩沖、數據合併、 udp數據報裝幀及網路介面驅動等軟體編程。在pc端，通過mfc的網路應用開發類casyncsocket實現udp報的實時接收、數據解幀譯碼、高速存貯，利用windows消息機制開發了應用程序友好界面。 -
The fourth chapter : in this chapter, it introduces the hardware designing of the dsp system based on pci bus and states every module of the hardware designing : circuit of signal adjusting, filter circuit of anti - overlap, circuit of data - acquisition automatically, expanding circuit of dsp memory, circuit of voltage matching, interfaces circuit of pci etc. it also includes theoretic basis and procedure of pcb designing
第四章介紹基於pci總線的dsp系統硬體設計。敘述了硬體設計的各個模塊：信號調理電路、抗混疊濾波電路、自動數據採集電路、 dsp存儲器擴展電路、電平匹配電路、 pci介面電路等，以及pcb設計的理論基礎和設計過程，並給出了設計和調試的結果。 -
It is designed for embedded applications with the following features : separate instruction and data caches ( harvard architecture ), 5 - stage pipeline, hardware multiplier and divider, interrupt controller, 16 - bit i / o port and a flexible memory controller. new modules can easily be added using the on - chip amba ahb / apb buses. it has flexible peripheral interfaces, so can be used as an independent processor in the board - level application or as a core in the asic design
它遵照ieee - 1745 （ sparcv8 ）的結構，針對嵌入式應用具有以下特點：採用分離的指令和數據cache （哈佛結構） ，五級流水，硬體乘法器和除法器，中斷控制器， 16位的i / o埠和靈活的內存控制器，具有較強的異常處理功能，新模塊可以輕松的通過片上的ambaahb / apb總線添加。 -
The pointer to a row can contain some value which causes a hardware or software interrupt in case the row is not in memory.
指示器的指示字還包含一個值，當相應行不在存貯器中時，它引起硬設備或軟設備中斷。 -
This software system of chip simulation ' s main function is simulate the main logic circue chips, 8088cpu, memory, registers, data _ bus, address _ bus, control _ bus and other chips. this function is based on the object - oriented technology, construct the chip object by the chip classes that we defined. because this system need to simulate the detail function of computer hardware, so this system simulate the 8088cpu ' s order system, support the basic compile languages. one of the feture of this system is the simulation of a static memory, the room of the memory can be configured by testers from 1k to 64k
由於本系統在模擬過程中需要完全模擬計算機硬體的工作原理，因此本系統還模擬了8088cpu的基本指令系統，支持基本的匯編指令，在實驗過程中可以由實驗者輸入相應的匯編指令以執行操作，並查看各晶元器件的引腳參數變化情況。本系統模擬的一個特點是動態模擬了存儲器的大小，存儲器容量可以由實驗者根據需要自己設置，范圍從1k到64k 。 -
In order to reduce the memory space of the system, ac3 program is optimized and hardware / software co - design method is used to optimize the memory space consumed in system level assemble level and hardware level
為減少系統的存貯耗費，針對ac3程序進行了存貯優化，並提出了一種應用軟硬體協同設計的方法，即從系統級、匯編級和硬體級進行存貯優化。 -
Followed above, this dissertation has much content about the hardware design which include dsp, fpga, ddr sdram memory bank interface circuit, pci, power circuit, board - level interconnection design. this part puts much emphasis on key circuits many of which require us to have deeply known the components adopted and involved specifications
這部分主要是對電原理圖的重要地方和需要注意的地方進行重點闡述，包括dsp 、 fpga 、 ddrsdram內存條介面電路、 pci介面電路、電源、板級互連等部分。 -
It gives the hardware and softeware design of the temperature measure diagnose system of diesel enging ordinary failure. the hardware includes a infrared temperature measure appratus which contains memory and communication unites -, a data analysis computer which is used to analysis the data from the temperature measure appratus and gives the result report. the software includes modules such as comunicatio data analysis result print and operation interface between man and computer. it uses basic computer language which is easy to the users, the data communication instead of the data input with hand avoids the disadvantage of man and the erro of man
本文給出了柴油機常見故障測溫診斷系統的軟體系統和硬體系統的設計方法，硬體系統包括溫度檢測用的紅外測溫儀（具有數據存儲和數據通訊功能，可以很方便與上位計算機構成數據分析的診斷系統，在機車現場中操作十分方便）及用於數據處理的計算機系統（數據分析和報表） ；軟體系統採用basic語言開發了用於對紅外測溫儀數據讀取、分析和存儲並給出故障診斷結果的程序，具有代碼簡便、容易掌握和界面友好的特點，容易被現場工作人員接受。 -
Computer hardware because progressively less expensive and more reliable and nc control builders introduced for the first time read only memory ( rom ) technology
由於計算機硬體的日益成熟並大量低成本的被生產出來，數字計算機控制營造商們開始第一次引入只讀存儲器技術。 -
The hardware of the system is composed of a high - speed optical - isolator circuit, a first - in / first - out dual - port memory buffer circuit, a pci interface chip ql5032, and a logic control circuit
系統的硬體部分是由高速光電隔離電路，雙埠fifo存儲緩沖電路， pci總線介面電路ql5032及邏輯控制電路等組成。 -
The product has the following characters : all - purpose input, completed separated signal channels, collection of the signal data by scanning, the display technique of lcd big screen, flash memory ; capacious compatible floppy disk, 36 types of signals, multiple alarms, communication of rs232 / 485 and hart confered - link with a view to second generation technique of the field - bus. during the developing course, i used the method of reliability design to design hardware, and researched carefully the process of weak signal. pass to practice, the product has achieved all aim of the design
系統在功能上實現了萬能輸入，信號通道之間的完全隔離，信號的掃描採集，大屏幕lcd顯示技術， flash存儲器進行數據存儲，大容量的具有兼容性的電子軟盤， 36種信號方式，多種報警方式， rs232 / 485通訊，以及著眼于下一代的現場總線技術的hart協議介面等。 -
In the designed hardware, at89c51 single chip computer and many kinds of new type circuit chip ( including : special power measuring chip - cs5460a, ds1302 calendar / clock chip, sms0601 lcd, x5045 serial memory ) are used for design. the hardware circuit is simplified, the meter ' s anti - interference ability is enhanced and the precision of measurement is also advanced
設計中以at89c51單片機為核心，採用多種新型集成電路晶元（包括電能計量專用晶元cs5460a 、 ds1302日歷時鐘晶元、 sms0601液晶顯示器、 x5045串列存儲器）進行介面設計，簡化了硬體電路，提高了電能表的抗干擾能力和測量精度。 -
This subsection could include requirements for the software to operate inside various hardware constraints, such as timing constraints, memory constraints etc
本節包括軟體在不同的硬體平臺運行的需求，如時間相關的約束，內存方面的約束等。
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