phase detector 中文意思是什麼

phase detector 解釋
監相器,鑒相器檢相器
  • phase : n 1 形勢,局面,狀態;階級。2 方面,側面。3 【天文學】(月等的)變相,盈虧;【物、天】相,周相,...
  • detector : n. 1. 發覺者。2. 偵查器。3. 【化學】檢定器。4. 【電學】檢電器。5. 【電訊】檢波器,指示器。
  1. Research on chaotic phenomena of phase - locked frequency detector with triangular phase - detector

    三角形鑒相特性鎖相鑒頻器中混沌現象的研究
  2. Research on the design of programmability frequency multiplier and phase detector on isp devices

    器件的可編程倍頻鑒相邏輯電路的設計
  3. Verification regulation of 500mhz phase noise measurement set phase detector method

    500mhz鑒相式相位噪聲測量裝置檢定規程
  4. The motive of this mm frequency synthesizer is also given in this chapter. chapter 2 emphasizes on the pll, first, introduce the module of basic components of pll, such as phase detector, loop filter and the voltage control oscillate ( vco ). secondly, describe the theory of the linearity pll

    第一章介紹了頻率綜合器(簡稱頻綜)的發展過程,對各種頻率合成的技術進行了簡單的概括和對比,簡述了毫米波及其特點,並介紹了本文所作研究工作的研究目的及意義
  5. The signal generator of sweep frequency is based on dds device ad9954, the signal measuring circuit is based on gain and phase detector ad8302, the real - time control and deal circuit is based on tms320vc5409, and the periphery interface circuit is based on at89s52. the system can generate sweep frequency signal with the frequency range from 100khz to 150mhz, and with the power range from - 45dbm to + 18dbm. it can measure the gain and phase of the network, display the measure data by liquid crystal displayed and print it by the printer

    該測試儀以dds晶元ad9954為核心構成掃頻信號源電路,以增益相位檢測器ad8302為核心構成檢測電路,以dsp晶元tms320vc5409為核心構成控制與運算電路,以及以at89s52為核心構成外圍介面電路。該測試儀能產生頻率范圍達100k ~ 100mhz ,功率范圍為- 45dbm ~ + 18dbm的掃頻信號,能對被測網路的頻率特性進行測量,並留有豐富的外圍介面,可以將測量數據繪圖通過lcd顯示或者由印表機列印輸出。
  6. In the paper, the design of the real - time test system for crystal parameters is presented. the signal generator of sweep frequency based on dds device ad9852, the signal measuring circuit based on gain and phase detector ad8302, and the real - time control and deal circuit based on tms320vc5416 and the design of high - speed printed digital & analog circuit board are discussed in details

    本文闡述了晶振實時測量系統的設計,介紹了以dds晶元ad9852為核心的掃頻信號源電路,以增益相位檢測器ad8302為核心的信號檢測電路,以dsp晶元tms320vc5416為核心的實時控制與運算電路,以及高速數模混合電路板的設計方法。
  7. All this technique and means can be used as a guide for analyzing and optimizing phase - detector type circuits, and the technique to use performance analysis function can be used for designing all kinds of circuits

    這種方法和思路對鑒相器一類電路的分析和優化具有借鑒意義,而性能分析的使用技巧則對使用orcad pspice9軟體的各類電路設計人員具有普遍的借鑒意義。
  8. In this method, the phase difference between two compared signals that have same nominal frequency can be converted into voltage signal by phase detector. the voltage signal varies linearly with the phase difference and can be displayed or recorded by some instruments

    此方法是將兩個被比對的標稱值相同的標準頻率信號之間的相位關系,通過線性鑒相器轉換成與它成線性關系的電壓信號,並通過相應的設備進行顯示紀錄。
  9. This paper solves the two problems firstly, and then analyzes the performance of x47 phase - detector with the orcadipspice9 ? function of performance analysis, gives the theoretical analysis of it ? working principle, optimizes it with orcad / pspice9 software

    本論文的工作首先是解決了這兩方面的問題。在解決這兩個問題的基礎上,本論文用orcad pspice9軟體分析了x47鑒相器的特性,從理論上分析了它的工作原理,並進行了優化設計。
  10. The x47 phase - detector is an analog integrated circuit produced by the 24th institute of the information industry department. the main function of x47 phase - detector is to detect the difference of phases of its two input signals. but it ? erformance can not be analyzed by directly using the orcad / pspice9 ? - - - - a world - wide well known general purpose simulation software, and all circuits and systems using this kind of phase detector can not be directly simulated by orcad / pspice9 either

    X47鑒相器是信息產業部第24研究所設計生產的一種模擬集成電路,用於鑒別兩路輸入信號的相位,但是卻不能直接用通用的電路模擬軟體orcad pspice9分析其性能,使用x47鑒相器的電路和系統也不能直接用orcad pspice9進行模擬。
  11. The basic operation principle of phase - locked frequency synthesizer and the type of circuits are expatiated systematicly in this paper. the principle of operation on sampling phase detector and some characteristics including the linear tracking and phase noise in phase loop circuits are analyzed deeply. the research is emphased on the theory and design method of circuits in the sampling phase - locked frequency synthesizer. then, the expansion capturing circuit is analyzed and designed for better performance of capturing loop circuits. at last, the loop filter is also analyzed and contrived taking account of effection of additional phase shift by the sampling - holder. the general research on the theory and technology of sampling phase lock in the paper will make a basement for the development of new product

    本文系統的闡述了鎖相頻率合成器的基本工作原理及電路類型;較深入地分析了取樣鑒相工作原理及電路、鎖相環路的線性跟蹤特性和相位噪聲特性;重點對取樣鎖相頻率合成器電路理論和設計方法進行了研究;為了改善環路的捕獲性能,對擴捕電路進行了分析和設計,並用wewb32軟體對電路進行了模擬;考慮到取樣保持器的附加相移影響,對環路濾波器進行了分析和設計。
  12. Then according to the emphasis of the design, went deeply into the theory of pll frequency synthesizers widely used, described pll ’ s working principle, structure and several types in detail, and made research and analysis of pll frequency synthesizers ’ phase noise, including the effect of the active loop filter on the phase noise, and give some methods to make improvement as well, such as changing loop filter form, reducing divide number, and increase phase detector frequency, etc. then paper introduced the principle character and phase noise analysis of direct digital frequency synthesizer ( dds ) and injection phase lock circuit, which are also important circuits in the design

    論文首先對幾十年頻率合成器的發展進行概述,而後針對本次設計的重點,對應用較為廣泛的鎖相頻率合成理論進行了深入的探討,詳細介紹了鎖相環的工作原理、組成結構和鎖相類型,並對鎖相頻率合成器的相噪特性進行了研究分析,包括有源環路濾波器對于相噪的影響,提出了改善相位噪聲的幾點措施:改善環路形式、降低分頻數、增大鑒相頻率等。接著介紹了直接數字頻率合成器( dds )和注入鎖相電路的原理特點以及相噪分析,它們也是本次設計的重要電路。
  13. First, an analysis for the design of the impulse phase lock oscillate, which includes impulse phase detector the dielectric resonant oscillate etc. secondly, presents an analysis for the design of wide band balanced low noise amplifier. the last two part simplify the theory and the electrical characteristics of the sub harmonic mixer, and the mmvco

    第一部分著重介紹了脈沖鎖相源的工作原理(主要包括取樣鑒相器和介質穩頻的壓控振蕩器) ,並介紹了研製結果的性能指標;第二部分介紹了平衡式寬帶低噪聲放大器的基本理論
  14. The thesis describes a prototype fractional frequency synthesizer which is supported by a project granted by the ministry of science and technology of pr china. firstly, based on the principle of pll, this paper briefly describes three basic pll components : phase detector ( pd ), low pass filter ( lpf ), voltage controlled oscillators ( vco ), analyzes the linearized pll and summaries the transfer functions of third - order pll with ideal intergrator filter respectively. based on a microwave vco, the single point frequency pll frequency ranging from 2. 2 to 2. 5ghz is developed

    首先,從鎖相環的基本理論、原理出發,分析了鎖相環中的三個基本部件:鑒相器、環路濾波器和壓控振蕩器,此後,針對線性化鎖相環進行了分析,研究了在使用比例積分濾波器時,三階鎖相環的環路參數計算;在電路實現時選用了lmx2353 ,在此基礎上,完成了2 . 2 ~ 2 . 5ghz范圍內的小數頻率合成器設計。
  15. Through all the works above, this paper summarizes the technique to analyse the phase - detector type circuits with orcad / pspice9 software, especially it ? function of parameter sweep and performance analysis ; summes up the ways and means to optimize phase - detector type circuits with orcadipspice9 ? optimizer module

    通過上述工作,本論文總結了用orcad pspice9特別是其參數掃描和性能分析功能分析鑒相器一類電路的方法;概括出了用其優化模塊optimizer和性能分析功能對鑒相器一類電路進行優化設計的步驟和思路。
  16. The main contribution of the thesis is seen as follows : aiming at the fault with slow speed and high power dissipation of the conventional phase - frequency detector, a high speed and low power dissipation phase - frequency detector is designed by modifying the structure of the single phase lock dynamic d flip - flop and adding the delay cell in the feedback loop to eliminate the phase detector ’ s dead zone effectively

    論文的主要貢獻為以下幾個方面: 1 .針對傳統鑒頻鑒相器速度慢、功耗高的缺點,改進了單相時鐘動態d觸發器的結構,設計出了一種高速低功耗的鑒頻鑒相器,在反饋迴路上加入延遲單元,能有效的消除鑒相死區。
  17. The design of phase detector based on fpga

    的相位檢測儀的設計
  18. The measurement precision mainly depends on two aspect, one is the phase noise of frequency standard, the other is the linearity of phase detector in the range from 0 to 360

    此方法測量精度的高低,主要取決于兩個方面,即頻率標準本身相位噪聲的情況和在0 360范圍內鑒相的線性度。
  19. With the application of phase detector in industrial experiment on the spot, when the phase of working frequency power supply is consistent with the output phase of variable frequency power supply, plc sends out the instruction to switch off the output of transducer. the electromotor is connected with the industrial frequency voltage after it was disconnected from the out

    在現場工業試驗引入鑒頻鑒相控制器,在工頻電源和變頻輸出電源相位一致時, plc發出指令切斷變頻器輸出,電機從變頻器輸出端斷開后,馬上接入工頻電源,轉換時間控制在幾十毫秒之內。
  20. The fourth, mainly talk about the phase noise in the pll, and discuss the specific affect on out put phase noise caused by different components in frequency synthesizer, such as mixer, amplifier, multipler, divider, oscillator, phase detector etc. the last part is about how to choice the natural frequency of pll in order to get the better performance in phase noise

    第二章從鎖相環的基本原理出發,介紹了鎖相環的幾個基本部件:鑒相器?環路濾波器和壓控振蕩器,對線性化鎖相環進行了詳細的分析,對數字鎖相環做了詳細的介紹,分析了鎖相環的相位噪聲模型,討論了頻綜中的混頻器
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