phase locked logic 中文意思是什麼
phase locked logic
解釋
鎖相邏輯-
Utilizing phase locked loop technique with complex programmable logic devices ( cpld ), a method to perform high - speed data acquisition, storage and transmission for transformer testing, which solves the problem of data acquisition for high frequency band, is proposed
摘要提出了利用鎖相環技術結合復雜可編程邏輯器件( cpld )實現對變壓器測試信號的高速採集、存儲、傳輸的方法,很好地解決了對變壓器高頻特性信號的採集。
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