phase-lock circuit 中文意思是什麼

phase-lock circuit 解釋
相位同步電路
  • phase : n 1 形勢,局面,狀態;階級。2 方面,側面。3 【天文學】(月等的)變相,盈虧;【物、天】相,周相,...
  • lock : n 1 鎖,閂,栓。2 (運河等的)船閘。3 制輪楔。4 【機械工程】氣閘,氣塞,鎖氣室。5 【軍事】槍機。6...
  • circuit : n 1 (某一范圍的)周邊一圈;巡迴,周遊;巡迴路線[區域];迂路。2 巡迴審判(區);巡迴律師會。3 【...
  1. Monitor apparatus can measure valid value of three phase voltage and current, power factor, three phase disequilibrium, instant flecker of short time and harmonic without twenty, degree and harmonic distortion total. the paper are laid on the following. ( 1 ) master plan and function of circuit, ( 2 ) hardware design including circuit and principle of a / d conversion, phase lock, liquid crystal display and keystroke and so on, ( 3 ) design of system software including digital filtering, fft, a / d conversion and monitor interface of pc, ( 4 ) system test

    監測儀能夠完成包括三相電壓、三相電流的有效值、功率因數、三相不平衡、電壓短期閃變、以及20次內的諧波、諧波相位、諧波失真總量等的測量。論文重點介紹了以下幾部分: ( 1 )電路的總體設計和功能; ( 2 )硬體設計,包括a d轉換、鎖相環、液晶顯示和按鍵輸入等原理和電路。 ( 3 )系統軟體設計,包括a d轉換、 fft 、數字濾波等程序的原理和演算法以及上位機監控界面的設計; ( 4 )系統測試。
  2. The single - chip microcomputer control technology has been applied in the system to carry out monitoring and protective functions for the asynchronous motors controlled. combined with suitable peripheral interface, disposition and flexible software, the mcs can measure the current and voltage signals of the motors. based on the measurements, the computation, judgment and decision are made to implement the phase sensitive short circuit, overload, supply over - voltage, supply under - voltage, over - thermal, leakage lock - out and loss of phase protective function

    系統採用單片機控制技術,完成所控制電動機的控制功能,並對所控制電動機的電壓、電流等信號進行檢測、計算、判斷和處理,實現短路、斷相、過載、欠壓、過壓、過熱、漏電閉鎖等保護功能,並提供本質安全型輸入、輸出介面,能與煤礦井下監測監控系統聯網運行。
  3. Then we uses the scheme that has the variable gain based on the kalman filtering model realize two steps phase - locks ring circuit track technology, this kind has the advantage that when changed the gain the digital phase - lock link to be allowed simultaneously to realize the fast capture and the reliable track, the simulation analyzes its capture performance

    模擬結果表明,自編碼直擴通信系統的編碼捕獲性能具有可行性。採用基於卡爾曼濾波模型實現具有可變增益的二階鎖相環路的跟蹤技術,這種具有時變增益的數字鎖相環可以同時實現快速捕獲和可靠跟蹤,其捕獲性能要比傳統數字鎖相環改善很多。
  4. Phase lock and multiple frequency circuit diminishes the influence from frequency fluctuation of electric net ; in addition, multiple channels simultaneous sampling, high - precision circuit decreases the error caused from the sampling tache

    用鎖相倍頻跟蹤電路來提供采樣頻率,以減少頻率波動的影響,用多路同採的高精度采樣電路來減少採樣環節引入的誤差。
  5. Firstly, computer model of mdrlg is set up for simulation purpose. by simulation about the two output signals of mdrlg, four basic waveforms between the two signals in lock - in area are found out and the fact is discovered that the old phase - demodulation circuit introduces errors when it is used for demodulating two of the four basic waveforms

    本文首先建立了機抖陀螺的計算機模擬模型,利用該模型對陀螺兩路計數信號及原有鑒相電路進行了模擬,發現兩路計數信號過鎖區時存在四種基本波形,且原有鑒相電路對其中兩種波形產生鑒相誤差。
  6. Inside the integrated circuit ic1, after suitable divisions, the two frequencies are sent to the phase comparator that generates the lock voltage of the secondary oscillator

    在綜合電路ic1的內部,經過合適的劃分,兩個頻率被送往相位比較儀,這兩個頻率產生二級振蕩器的鎖電壓。
  7. The basic operation principle of phase - locked frequency synthesizer and the type of circuits are expatiated systematicly in this paper. the principle of operation on sampling phase detector and some characteristics including the linear tracking and phase noise in phase loop circuits are analyzed deeply. the research is emphased on the theory and design method of circuits in the sampling phase - locked frequency synthesizer. then, the expansion capturing circuit is analyzed and designed for better performance of capturing loop circuits. at last, the loop filter is also analyzed and contrived taking account of effection of additional phase shift by the sampling - holder. the general research on the theory and technology of sampling phase lock in the paper will make a basement for the development of new product

    本文系統的闡述了鎖相頻率合成器的基本工作原理及電路類型;較深入地分析了取樣鑒相工作原理及電路、鎖相環路的線性跟蹤特性和相位噪聲特性;重點對取樣鎖相頻率合成器電路理論和設計方法進行了研究;為了改善環路的捕獲性能,對擴捕電路進行了分析和設計,並用wewb32軟體對電路進行了模擬;考慮到取樣保持器的附加相移影響,對環路濾波器進行了分析和設計。
  8. Dds is used to achieve fine resolution, while injection phase lock circuit is used to realize low phase noise high performance input reference frequency

    Dds用於實現小步進,而注入鎖相電路則用來產生低相噪的高性能參考源。
  9. Then according to the emphasis of the design, went deeply into the theory of pll frequency synthesizers widely used, described pll ’ s working principle, structure and several types in detail, and made research and analysis of pll frequency synthesizers ’ phase noise, including the effect of the active loop filter on the phase noise, and give some methods to make improvement as well, such as changing loop filter form, reducing divide number, and increase phase detector frequency, etc. then paper introduced the principle character and phase noise analysis of direct digital frequency synthesizer ( dds ) and injection phase lock circuit, which are also important circuits in the design

    論文首先對幾十年頻率合成器的發展進行概述,而後針對本次設計的重點,對應用較為廣泛的鎖相頻率合成理論進行了深入的探討,詳細介紹了鎖相環的工作原理、組成結構和鎖相類型,並對鎖相頻率合成器的相噪特性進行了研究分析,包括有源環路濾波器對于相噪的影響,提出了改善相位噪聲的幾點措施:改善環路形式、降低分頻數、增大鑒相頻率等。接著介紹了直接數字頻率合成器( dds )和注入鎖相電路的原理特點以及相噪分析,它們也是本次設計的重要電路。
  10. A zero - voltage starting method is brought forward which switch the starting from separate exciting to self - exciting successfully ; pll ( phase lock loop ) technology is employed to realize the frequency tracing and constant phase angle control ; igbt driving and protective circuit suitable for parallel inverter is developed, which successfully solve the problem of time compensating and overlapping regulation for the driving signals ; a novel and practical over - voltage protective method for parallel inverters is presented which effectively avoid the possible over - voltage destroy to the inverter. xu haiwen ( power electronics and electric driving ) directed by senior engineer peng yonglong

    提出了一種零壓啟動的他激轉自激方法;通過採用鎖相環技術實現了逆變器工作頻率的自動跟蹤和容性逆變角度的恆值控制;設計了適用於並聯諧振型逆變器的igbt驅動與保護電路,解決了驅動信號的時間補償以及重疊角的可調問題;提出了一種新穎、實用的逆變器過壓保護方法,有效地解決了並聯型諧振逆變器過壓保護這一難題。
  11. A kind of accurate automatic gain control circuit based on phase lock loop

    基於鎖相環的精確自動增益控制電路
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