phase-locking 中文意思是什麼
phase-locking
解釋
鎖相-
The characteristic quantity ( like the " transfer number " defined in this thesis ) that describes the higher period orbits forms a sequence of phase - locked steps on the plane formed by it and the control parameter. all the phase - locked steps form a so - called prelude phase - locking staircase to type v intermittency
描述這些過渡高周期軌道的特徵量（如本文定義的穿越數）在這個特徵量和控制參量構成的平面上形成一系列鎖相臺階，所有的臺階構成所謂的v型陣發前奏階梯。 -
Mode locking can be induced not only by loss modulation, but also by phase modulation.
鎖模不僅可用損耗調制取得，也可用位相調制來得到。 -
There has been a revolutionary advance in ultrashort pulse technology since the discovery of self - mode locking of ti : sapphire lasers. few - femtosecond pulses have already been generated from ti : sapphire lasers, by means of combining self - phase modulation with negative group velocity dispersion, which is similar to the way of soliton generation
鈦寶石激光自鎖模的發現使得超短脈沖技術發生了革命性的變化，利用自相位調制和負群速度色散結合的類孤子產生方式，人們已經在鈦寶石鎖模激光器上得到了脈寬只有幾個飛秒的光脈沖。 -
Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper, carried on intact summing up to the data in the system, having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram, give solution that many pieces of sdram works togetherses of realizing heavy capacity, designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus, optimize back end state machine design and urge procedure making with lower, giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices, due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal, method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo
本文首先對數字減影血管造影（ dsa ）成像系統的組成結構和數據流向進行了深入研究和分析，並對系統中的數據流向進行了完整的歸納和總結，給出了x線數字成像系統中的高速大容量數據通道的設計方案；在對sdram的控制方式做了深入探討后，給出了實現大容量多條sdram共同工作的解決方案，在此基礎上設計了大容量幀存板實現對圖象數據進行高速存儲；通過對pci總線介面的深入研究，優化後端狀態機設計和低層驅動程序開發，給出了完整的pci介面方案實現高速dma數據傳輸，完全可以滿足視頻傳輸要求；深入研究了基於大規模可編程器件的數字系統設計方法，針對通用fifo使能信號漂移、輸出數據難于建立和保持等設計難點，提出了利用fpga中的鎖相環提供多個時鐘相移的信號來提高系統穩定性的解決方案，從而實現利用fifo來協調系統各模塊之間的數據高速傳輸。 -
This is the first time to observe a prelude phase - locking staircase to type v intermittency with other forms
這是第一次在實際模型中發現非傳統魔梯形式的v型陣發前奏鎖相階梯。 -
The correlations between wind stress anomaly over the tropical pacific and ssta using svd analysis shows that the wind stress patterns are corresponding to enso eigenmode. it is suggestive that the explanation, simulation and prediction of el nino / la nina evolution in space - time should not be based on a single eigenmode but on their interaction, with emphasis on the fact that superimposition and phase locking are important factors of the event cycle
對緯向、經向風應力距平與ssta做svd分析赤道太平洋地區風應力異常和海表溫度異常之間的相關關系顯示，經pop分析得到的緯向、經向風應力的空間型與elnino lanina時的ssta具有很好的對應關系。 -
In addition to the known characteristics of type v intermittency, such as the mechanism of the border - collision bifurcation and the logarithmic scaling behavior of the averaged laminar lengths, a new characteristic of type v iritermittency discovered in this system is the so - called " prelude phase - locking staircase to type v intermittency ", which does not show the traditional devil ' s staircase form
除了v型陣發的已知特徵，如由邊界碰撞分岔導致周期軌道失穩，以及具有對數函數形式的平均層流相長度標度律等等之外，在這個系統中發現的一個v型陣發新特徵是非傳統魔梯形式的v型陣發前奏鎖相階梯。 -
Most of the traditional real - time detecting method for harmonic current is based on sinusoidal voltage or locking the voltage phase accurately, which deviating from the real circumstances
由於傳統的諧波電流實時檢測方法大都是基於正弦的電壓系統或對于電壓波形達到精確鎖相的前提，而現實情況卻往往不是如此。 -
In this thesis, phase - locked loop ( pll ) technogies are used to acquire phase of fundamental current in bais current, which enhances the detecting precision of bais current. and we want the phase of bais current and the phase of system current is the same, so this thesis think of locking the phase of bais current which based on this theory to sure the security and the reliability of apf
本文採用鎖相技術，以獲得畸變電流中基波電流的相位，進一步提高了畸變電流的檢測精度，並據此原理考慮鎖定補償電流的相位，使補償電流與系統電流相位同步，保證apf安全可靠運行。 -
The injection - locking technology, characterized by the frequency stabilization, amplification, modulation and etc, has been widely used in the small - signal recovery, frequency synchronization, power synthesis, phase modulation and etc in the microwave, millimeter wave and higher frequency range communication and phased - array systems
注入鎖定技術具有穩頻、放大、調制等特性，已被廣泛應用於微波毫米波以及更高頻段通信和相控陣系統中的小信號恢復、頻率同步、功率合成、相位調制等。 -
It can be deduced from the characteristics of ilpll circuit that injection - locking bandwidth is not only related to the injection - locking bandwidth without feedback loop, but also related to the characteristics of frequency mixing, loop gain and the change of the loop phase. thus, the needed bandwidth can be obtained by adjusting the loop parameters. and the phase noise characteristics are mainly determined by loop transmission factor
由ilpll電路特性的推導得出:注入鎖定帶寬不僅跟開環時的注鎖帶寬有關，而且與混頻特性、環路增益以及環路相位變化相關聯，可以通過調節環路的參數得到所需帶寬;相噪特性主要由環路傳輸因子決定，可以通過調節環路濾波得到比開環注入鎖定相噪更優的特性。 -
It is shown that the parameter plays an important role in phase transition of the system, and there is a locking phenomenon in the fhn model
研究發現：在雙奇異的fhn神經模型中，當奇異性標度增大到一定程度時，神經電位被鎖定在靜息電位。 -
This seems to be a common feature of the chaotic attractors those appear after the prelude phase - locking staircase in the system
這很可能是這個系統中v型陣發前奏鎖相階梯后的混沌吸引子的共同特徵。 -
Our numerical investigation also indicates that the chaotic attractor appeared after the prelude phase - locking staircase was end - result of the set of the images of the discontinuous border of the system function
我們的數值結果還說明在v型陣發前奏鎖相階梯之後出現的混沌吸引子就是映象函數的不連續邊界的象集的歸宿。 -
And the new circuit structure for improving the locking range, that is, injection - locked phase - locked loop circuit ( ilpll ) is introduced into the millimeter wave circuit
在此基礎上，結合注入鎖定和環路鎖相原理，在毫米波頻率源中引入了一種新型的展寬帶寬的電路結構環路注入鎖定鎖相電路（ ilpll ） 。 -
Frequency source is widely used in today ' s electronic equipment and even refered as " a heart " of many electronic systems. the frequency synthesizer with a lot of channels and high frequency stability by means of theory of phase locking has almost been a necessary component in the modern electronic systems such as telecommunication, radar and electronic countermeasure. the phase - locked frequency synthesizer can be generally divided into two kinds : one is digital phase locked frequency synthesizer, the other is analog sampling phase locked frequency synthesizer. compared with the prior, the latter has many merits such as lower phase noise, samller volume, lighter weight and lower power consumption and has a wide foreground in the equipments of microwave band
利用鎖相原理來獲得波道數目眾多、頻率穩定度很高的頻率合成器，幾乎已成為現代通信、雷達和電子對抗等電子系統不可缺少的組成部分。鎖相式頻率合成器一般分為數字鎖相頻率合成器和模擬取樣鎖相頻率合成器兩類。取樣鎖相頻率合成器與數字鎖相頻率合成器相比，具有相位噪聲低、體積小、重量輕和功耗低等優點，尤其在微波波段的電子設備中，具有廣闊的應用前景。 -
Design and realization of a single - chip digital phase - locking frequency - multiplier circuit
單片數字鎖相倍頻電路的設計與實現 -
The paper analyzes in detail the characteristics of this circuit in the aspect of locking range improvement and its merits in the aspect of phase noise, and designs the ilpll circuit in the form of ka band cavity structure and verifies its characteristics
文章詳盡分析了此電路在展寬帶寬方面的特性和相噪的優越性，設計了ka波段腔體結構形式的ilpll電路並驗證了其特性。 -
Deferred global view maintenance can speed up the update transactions by shifting maintenance into a deferred transaction, but even strict two phase locking ( 2pl ) can not guarantee the serializable execution of transactions in this case. this paper develops a serializabitity theory base upon conflicts and serialization graphs in presence of deferred global view maintenance
由於延遲視圖維護機制允許修改事務在全局視圖沒有進行相應的改動之前提交，有暫時的數據不一致情況出現，在這種情況下，即使嚴格的zpl協議也不能保證全局事務的可串列化執行。 -
In the system, control unit accomplishes back - emf zero - crossing information reading and closed loop commutation. the system eliminates the pwm interferences and the commutating interferences by filtering with software algorithm. in order to make the bldc commutate exactly, the method of three - point estimation is used for phase locking in the system. the system also accomplishes several important objects, such as tmppt of photovoltaic arrays, unmanned supervision of the system, fault detection etc. the results of the experiment show that the device, which is made on the base of the principle above, can control the motor to complete the exact commutation
系統以motorola單片機jl3為核心，完成了系統外圍硬體電路和控制軟體設計，實現了直流無刷電機反電勢過零檢測，利用軟體濾波的方式消除了pwm波干擾及換相干擾；採用三點預估演算法，進行相位鎖定，以完成直流無刷電機準確換相；同時實現了光伏陣列工作點的tmppt跟蹤、系統無人監控和故障檢測等功能。
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