pll 中文意思是什麼

pll 解釋
多聚l-賴氨酸
  1. An adaptive harmonic current calculation arithmetic for apf using pll - produced reference voltage

    產生參考電壓的自適應諧波電流檢測方法
  2. Contrapose to the instability of the third - order charge - pump pll system, the loop optimization method is employed in system level design to decide the bandwidth and phase margin, therefore the loop bandwidth locates at the maximum phase margin to guarantee the stability of the system. according to tsmc 0. 35 m sige bicmos model, the sub - circuits in the designed pll and the whole system are simulated and verified by the cadence spectre

    5 .根據tsmc0 . 35 msigebicmos工藝模型，利用cadencespectre模擬軟體對所設計的電荷泵鎖相環路中各個模塊及整個系統進行了模擬模擬，模擬結果顯示，在1 . 5v電源電壓下，頻率為200mhz的參考輸入信號，輸出中心頻率為800mhz ，分頻電路採用4分頻，環路帶寬為10mhz ，捕獲時間大約為0 . 92 s ，功耗大約為15mw ，達到了設計指標。
  3. A 45 48 mhz pll frequency synthesizer for cordless phone receiver

    接收機鎖相環頻率合成器
  4. The core instrument for frequency - following is the pll. the dsp is used to realize the regulating of the dead time on - line

    用鎖相環作為頻率跟蹤的核心器件，根據最佳死區的理論，用dsp實現死區的在線調節。
  5. In the next place, by studying the change of the resonant frequency of the whole system, this paper designs the circuit to track the resonant frequency of the system by cd4046 mainly. at the same time, in order to improve the efficiency and get better dynamic capability of the converter, we choose pll and fuzzy control after comparing the pll circuit, fuzzy circuit and pll ? fuzzy control circuit. in the end, this paper brings forward the control blue print to realize the drive control circuit of the high frequency converter, using the dsp chip as the key part to realize four routes of pwm drive pulses with dead band of the control system

    其次，通過對整個系統諧振頻率變化的分析和研究，設計了以鎖相環cd4046為核心的鎖相環控制電路，同時，在綜合比較鎖相環控制、模糊控制以及模糊控制和鎖相環復合控制三種控制演算法的基礎上，進行了系統模擬，得出採用復合控制可使跟蹤電路既具有鎖相環路較好的穩態性能，又擁有模糊控制較好的動態性能，系統魯棒性能好，同時也提高了逆變器的效率。
  6. Chapter 3 discusses the modules used in the fh - mpsk and fh - / 4dqpsk systems. these modules include : duc / ddc ( digital up converter / digital down converter ), nyquist flitter, burst start detection, interpolation module, pll ( phase locked loop ), pll error extraction, initial phase correction and the coding and decoding for tcm

    第三章主要討論了跳頻模式下fh - mpsk和fh - 4dqpsk系統中各個模塊的設計，這些模塊包括：上下變頻器、奈奎斯特濾波器、信號到達檢測、插值模塊、通用環路、各環路誤差提取方法、初始相位校正和tcm編譯碼。
  7. Design of hardware consists of three pll loops, micro wave sample mixer, fractional - n frequency divider

    硬體電路包括三個鎖相環，取樣混頻器，分數分頻器的設計等。
  8. The pll consists of a crystal oscillator, a ring voltage - control - oscillator, a frequency divider, a phase / frequency detector, a charge pump and a loop filter

    設計的電路包括20mhz晶體振蕩器，鑒頻鑒相器，壓控振蕩器，固定分頻器，電荷泵和低通濾波器。
  9. The design of hfc network management data modulator based on pll

    網管數據調制器設計
  10. In allusion to the working characteristics and technical difficulties of 155mb / s burst mode receiver, we have put forward to the quick synchronization of inpouring phase locked loops ( pll ). for receiving burst signal, we introduce the scheme of dc coupling and dynamic threshold decision

    針對155mb s突發式收發模塊的工作特點和技術難點，我們提出了注入鎖相環法的快速同步技術；對于突發式信號的接收，我們採用了直流耦合和動態閾值判決的技術方案。
  11. To comply with the low - power - consumption application, low - voltage design is taken into account by using some special circuit structures. besides there are many nonideal effects in pll which degrade the loop performance badly, some efficient solutions have been put forward to suppress the undesired ones

    此外論文還討論了若干制約環路性能的非理想效應，並在借鑒國外相關理論成果的基礎上，成功設計了克服這類效應的一些改進電路。
  12. The designs of the pfd, digital filter ocxo and fractional - n counter in the frequency synthesizer unit are discussed, based on the pll theory. in order to improve the precision of pll, some design methods of pfd are given, and its feasibility is validated by the fpga hardware implement

    2 .在鎖相理論指導下，第三章討論了頻率合成器設計中的鑒頻鑒相器、數字濾波器、恆溫壓控振蕩器和分頻電路設計。為了進一步提高頻率合成的精度，文中給出了提高鑒頻鑒相器性能的一些設計思想，結合fpga的硬體設計驗證了其可行性。
  13. Pll - qpsk, phased - locked loop quadrature phase shift keying

    鎖相環四相相移鍵控
  14. Pll - qpsk phased - locked loop quadrature phase shift keying

    鎖相環四相相移鍵控
  15. This paper illuminates theory, structure, spectrum distribution, merits and defects, especially spurs of direct digital synthesis ( dds ), and it then introduces phase locked loop ( pll ) theory

    對dds的結構、優缺點、頻譜分佈，特別是雜散性能進行了詳細的闡述。接著，又介紹了鎖相環（ pll ）的原理。
  16. Bicmos pll frequency synthesizer for uhf receiver

    4106的鎖相環頻率合成器設計與實現
  17. Design and realization of pll frequency synthesizer based on mc

    頻率合成器設計與實現
  18. X - band radar signal frequency synthesizer based on dds - driven pll

    波段雷達信號頻率綜合器
  19. This paper analyses the applied characteristic of phase - locked loops ( pll ) for the forward motion compensation technology of lmk aerial survey camera. according to the analysis, a new style pcb is produced. the realization by software for the forward motion compensation is discussed in this paper, which is realized by the ti prduction tms320f240

    在對lmk航空攝影機像移補償控制系統的再設計工作中，本人設計出了新的補償電路線路板，並進行了幾項典型的實驗研究和前向運動補償效果評價，經過外場飛行試驗，進一步證明了該設計的可靠性、可行性、實用性。
  20. The field of video signal processing is now undergoing a digital reform. the digital processing technique is clearly expatiated in this paper, such as a / d convert, anti - alias filter, clamp control, gain control, pll, synchronization circuit, color decoder, comb filters

    本文詳細敘述了視頻圖像的數字處理方法，重點介紹了視頻信號數字化技術、抗混疊濾波器、箝位、增益控制、鎖相技術、同步時鐘產生、電視信號亮色分離、彩色解碼等技術，這些關鍵技術為視頻信號的數字化處理提供了重要的基礎。
分享友人
分享到 Line

分享到臉書