port bit 中文意思是什麼

port bit 解釋
大勒銜
  • port : n 1 港；港口；〈比喻〉避難港；避難所，休息處。2 （特指有海關的）港市；輸入港；通商口岸。3 機場，...
  • bit : n 1 少許，一點兒，一些；（食物的）一口，少量食物。 〈pl 〉 吃剩的食物；小片。2 〈口語〉一會兒，一...
  1. Class using the specified port name, baud rate, and parity bit

    使用指定的埠名稱、波特率和奇偶校驗位初始化
  2. It is designed for embedded applications with the following features : separate instruction and data caches ( harvard architecture ), 5 - stage pipeline, hardware multiplier and divider, interrupt controller, 16 - bit i / o port and a flexible memory controller. new modules can easily be added using the on - chip amba ahb / apb buses. it has flexible peripheral interfaces, so can be used as an independent processor in the board - level application or as a core in the asic design

    它遵照ieee - 1745 （ sparcv8 ）的結構，針對嵌入式應用具有以下特點：採用分離的指令和數據cache （哈佛結構） ，五級流水，硬體乘法器和除法器，中斷控制器， 16位的i / o埠和靈活的內存控制器，具有較強的異常處理功能，新模塊可以輕松的通過片上的ambaahb / apb總線添加。
  3. The end-conversion signal can be connected to an input-port bit, so it may be polled.

    轉換終了信號可以同輸入埠中的某一位相連，這樣便可對它進行查詢。
  4. Class when you want to specify the port name, the baud rate, and the parity bit

    當要指定埠名稱、波特率和奇偶校驗位時，請使用此構造函數創建
  5. Not only fault model, but also test arithmetic demand to be farther improved. the thesis, focusing on the 20 - port register file, makes a fault analysis, particularly in complex bridge fault and crosstalk coupling fault aroused by word - line and bit - line of 20 - port

    本文針對所設計的寄存器文件進行了故障分析，特別對20埠字線、位線引起的復雜橋接故障和串擾導致的耦合故障進行了詳盡論述。
  6. Forget the detractors, david mosberger - developer of the initial gcc port to ia - 64 and lead kernel architect for linux on ia - 64 - thinks you should care about intel s new 64 - bit chip

    別去管貶低者， david mosberger最初將gcc移植到ia - 64的開發人員以及ia - 64上的linux首席內核架構設計師認為您應關注intel的新64位晶元。
  7. Focusing on a 64 - bit high - performance general purpose microprocessor with fully independent intellectual property, the thesis investigates a 128 - word 65 - bit general register file with 12 - read and 8 - write ports which is a representational one for its large - scale and multi - port characteristics in that microprocessor, and realizes its full custom design with high speed in read and write access. from the layout simulation result, under the 0. 18um process, the upper limit working frequency for the register file is 900mhz

    本文面向一款具有完全自主知識產權的64位高性能通用處理器，對其中具有代表性的128字65位12讀埠和8寫埠的通用寄存器文件進行研究，實現了它的高速讀寫全定製設計，版圖模擬結果表明，在0 . 18um工藝下，設計可以工作的時鐘頻率上限為900mhz 。
  8. Class using the specified port name, baud rate, parity bit, and data bits

    使用指定的埠名稱、波特率、校驗位和數據位初始化
  9. Class using the specified port name, baud rate, parity bit, data bits, and stop bit

    使用指定的埠名稱、波特率、奇偶校驗位、數據位和停止位初始化
  10. David mosberger has been a 64 - bit linux guy since day one. while pursuing a graduate degree at the university of arizona in the early 90s, mosberger led the linux port to the alpha processor and soon found that his linux hobby was taking up as much time as his graduate work

    Mosberger在上個世紀九十年代早期在亞利桑那大學（ university of arizona ）攻讀碩士學位的同時，還領導著將linux向alpha處理器移植的工作，很快他發現自己的linux業余愛好占據了和研究生功課一樣多的時間。
  11. This device use great switch power supply which can give 100a, atmel 89c52 8 bit microcontroller, 192 * 64 lcd, a / d7135, and serial port printer, to print and save the testing data. comparing to the traditional method this device has high testing accuracy and high testing speed to fit the testing requirement

    本文採用可輸出100a的大功率開關電源， atme189c52八位單片機， 192 * 64大屏幕點陣式液晶顯示器， 41 2高精度a d轉換器icl7135 ，並配有串列印表機，可以將實時的測量數據進行列印、保存。
  12. If linux hadn t previously been ported to a dozen other architectures, the x86 64 port for the 64 - bit athlon would have been orders of magnitude more difficult than it was

    如果linux從前沒有移植到這么多的其他架構上，那麼64位athlon的x86 / 64移植就會比以前難上千百倍。
  13. Mattias wadenstein also maintains a similar machine and hands out accounts to interested developers. this port aims at supporting a mixed 32 64 bit userland, which requires significant

    移植工作的目標是要同時支持32 64 bit userland ，這需要對debian的架構進行相當的
  14. In the seventh chapter, some of the above proposed new circuit, such as high frequency, high definition 12 - bit, 80mhz samples / s current - steering dac and fully differential r - mosfet - c bessel filter with accurate group delay, high accuracy bandgap reference and high drive capability cmos operational amplifier have been applied in communication gsm baseband i / o port integrated circuit, all the above blocks meet well with the design requirements of the system, and gain the better testing results, in the mean time, the above proposed high accuracy bandgap reference circuit als

    第七章:將本文第二章提出的高速、高精度12位、 80mhz采樣率電流舵結構的數模轉換器和第五章提出的r一mosfet一c結構且具有精確群時延值的貝塞爾（ bessel ）濾波器以及第六章提出的高精度帶隙基準電壓源和高驅動能力全差分運算放大器電路應用於通信gsm基帶輸入/輸出埠晶元，滿足系統設計要求並取得了令人滿意的實測結果。
  15. In the process of design, the thesis using the circuit structure of inverter series within memory cell, and sharing read and write ports within multi - bit for the first time, solves dominoes effect for driving multi - read port problem, and reduces layout area of double - memory cell for about 40 %, respectively

    在設計過程中，首次對位單元採用反相器級聯的電路結構，解決了由於驅動多讀出埠問題引起的電路驅動多米諾效應;首次採用了多位共享讀寫埠的電路結構，減小了雙存儲體40 %的版圖面積。
  16. The circuit design of the can communication module based on sja1000 can controller and double - port ram idt7007 is completed, and the circuit design of data processing instrument based on sja1000 can controller and 20 - bit multi - range a / d converter is done, and the circuit design of output control instrument based on sja1000 can controller and tlc5616 d / a converter is completed

    在硬體上完成了基於sja1000can控制器和雙埠ramidt7007的can通信卡的電路、基於sja1000can控制器和20位多量程a / d轉換器的數據採集儀表的電路、以及基於sja1000can控制器和tlc5616d / a轉換器的輸出控制儀表的電路設計及實驗。
  17. In this thesis, firstly, the main protocols and their functions, the application profiles of bluetooth technology are introduced. the hci protocol is analysized emphasesly ; secondly, the 4 - channel 10v analog to digital conversion ( a / d ) bluetooth adapter, 4 - channel 10v digital to analog conversion ( d / a ) bluetooth adapter, rs232 serial port bluetooth adapter are developed. the hardware and software of them are realized and test ; thirdly, the test tool software for bluetooth adapter is designed. the displaying and saving of data with vc + + 6. 0 multithread in pc is completed, then the wireless serial port communication between pc and micro - controller unit ( mcu ) is implemented, the data results of those adapters are acceeded ; finally, the bit - error - rate testing software of bluetooth communication system is designed, and the bit - error - rate test results of bluetooth adapter in labortary are acquired and illustrated also

    其次提出了硬體設計方案:四通道10v模擬/數字（ a / d ）藍牙適配器、四通道10v數字/模擬（ d / a ）藍牙適配器， rs232串口通信藍牙適配器。在此基礎上完成了硬體電路和軟體程序的設計和調試。再次，設計了藍牙適配器測試工具軟體，在pc機上用vc6 . 0 + +多線程編程完成對傳輸數據的保存與顯示，實現了pc機與單片機的串口無線通信，並給出了藍牙適配器測試結果。
分享友人
分享到 Line

分享到臉書