port buffer 中文意思是什麼
port buffer
解釋
埠緩沖器-
Based on the dsp development board, the author finishes the hardware debug about the multi - channel buffered serial port ( mcbsp ) receiving the output signal from the gps if collector and resolves the software program of the receiving buffer of the multi - channel synchronous serial data, data integration, udp datagram encapsulation and network interface driver, etc. the real - time udp datagram receiving, data frame de - encapsulation and high speed data memory are implemented, and a friend application interface with windows message is developed on the pc
基於dsp開發板，作者完成了dsp的多通道緩沖串口（ mcbsp ）接收gps中頻接收機輸出信號的硬體調試，並解決了多通道同步串口數據的接收緩沖、數據合併、 udp數據報裝幀及網路介面驅動等軟體編程。在pc端，通過mfc的網路應用開發類casyncsocket實現udp報的實時接收、數據解幀譯碼、高速存貯，利用windows消息機制開發了應用程序友好界面。 -
The hardware of the system is composed of a high - speed optical - isolator circuit, a first - in / first - out dual - port memory buffer circuit, a pci interface chip ql5032, and a logic control circuit
系統的硬體部分是由高速光電隔離電路，雙埠fifo存儲緩沖電路， pci總線介面電路ql5032及邏輯控制電路等組成。 -
The proposed project that using the duel - port ram inner fpga as data buffer has greatly simplified the design process and enhanced the system performance
本設計中提出的利用fpga內部雙口塊ram構成數據緩存的實現方案大大的簡化了設計並提高了系統性能。 -
Concretely, on the basis of describing the communication specification of arinc 429 with enhanced parallel port ( epp ), the standard and the module application of dsp and cpld, the thesis has proposed the design of the arinc 429 technology based on dsp system. at first, the function and the application of each module of the system and the operation principle of high - performance cmos bus interface circuit hs - 3282 chip which forms the main body of the data diversion of the interface module are introduced. secondly, the hardware structure of the interface module is described in detail, mainly including data latch and buffer circuit, choice circuit of transmission rate, etc. and then the design philosophy and flow charts of the software are fully discussed, such as the basic requirement of software, the design and realization of the function
本文在簡單的論述了pc並口協議（ epp ）與dsp之間的通信方法、 cpld模塊邏輯控制應用和arinc429的通訊規范的基礎上，給出了基於dsp的arinc429通訊介面的設計方案:對通訊板中各模塊的功能和應用以及構成數據轉換主體的總線介面晶元hs - 3282的工作原理做了說明;介紹了本設計所用的dsp和cpld的功能概況;詳細敘述了通訊板介面模塊的硬體結構設計，其中，對數據緩沖電路、數據傳輸速率選擇電路、邏輯控制電路等各關鍵點做了重點介紹;具體闡述了軟體設計思想及流程圖，包括軟體的基本要求和功能的設計與實現;接著從埠譯碼單元、 i / o通道、電平轉換電路等方面進行了介面模塊的軟、硬體調試;最後，給出了測試結果，對研製工作做了總結，對本設計的優缺點各做了評述。 -
Socket function mainly realizes setting up and initializing service unit socket, initializing service unit and service unit serial and so on. bind funcion primarily binds local address and port for the socket. listen function is to evaluate the max length of server ’ s listening queue. connect function and accept function set aside rate ahead, infrom user ’ s request of establishing virtual circuit to suna, cooperate with suna to establish the connection between client and server, return the result. we make use of three handshake with data protocol and virtual circuit mode, in this way, when we translate data, we can look up communication course according to virtual circuit number, at the same time, there aren ’ t source ip address and port, end ip address and port in the head of data package, the speed of translating data advances in a certain extent. send function and recv function is to send data collaborating with suna, and copy data from the receiving queue of socket to user ’ s buffer. close function cooperate
Socket （ ）函數實現創建、初始化服務元套接字，初始化服務元及服務元序列等。 bind （ ）函數為套接字綁定本地地址和埠號。 connect （ ）和accept （ ）函數主要是根據用戶要求預留帶寬，將用戶的建立虛電路請求轉達給服務元網路體系，協作服務元網路體系採用捎帶數據的三次握手協議建立虛電路，並告訴用戶處理結果，一方面，捎帶數據的三次握手協議在一定程度上可提高數據傳輸速度;另一方面，採用虛電路方式，使得數據通信可直接根據虛電路號查找相應的通信進程，而且數據包的包頭中省去了源ip地址、埠號和目的ip地址、埠號，提高了數據傳輸速率。 -
We can take dsp to realize fast encryption algorithm because of its highly parallelism, application - specific hardware logic, and application - specific instructions. pci transaction and dsp processing of data can take place simultaneously for its dual - access ram ( daram ) and host port interface ( hpi ). and, the time taken for interruption almost can be ignored because of deep buffer technology
Dsp具有高度的并行結構、專用硬體邏輯以及許多專用指令，可以實現快速加密演算法， dsp的雙訪問ram （ daram ）和主機并行介面（ hpi ）可以實現數據pci傳送和dsp處理同時進行，另外採用了深度緩沖技術，使花在主機中斷上的時間幾乎可以忽略不計，所以基於dsp的計算機數據加密卡pcijmc2000獲得了較高的處理速度。 -
The hardware designing include the interface with engine controller, such as d / a conversion. we chose the ad75089 which was produced by ad corp. this is a parallel port digital to analog conversion, and i give the presentation about its structure and connection scheme. in order to resolve the contradiction between faster computation and slower display, a buffer storage also needed
第二部分詳細陳述了高速數據傳輸卡的軟、硬體設計過程，硬體設計包括dsp與pci總線的介面、 dsp與外部控制器的介面、以及電路卡上的擴展數據緩沖區的設計，並使用專門的工具軟體protel繪出全部硬體電路的設計原理圖。 -
The buffer overflow exists because of the way sql improperly handles data sent to its microsoft sql monitor port - udp port 1434
它利用microsoftsqlserver2000的緩沖區滿溢漏洞進行傳播。這個漏洞的成因是sql沒有妥善處理傳送往監察埠- udp1434的數據。 -
Writes data to the serial port output buffer
將數據寫入串列埠輸出緩沖區。 -
Gets or sets the size of the serial port output buffer
獲取或設置串列埠輸出緩沖區的大小。
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