reset design 中文意思是什麼
reset design
解釋
重置設計-
The part of communication card development is mainly composed of the design of reset circuit, the implement and control of sharing ram, the assignation of address and the design of eprom program
通信卡研製部分的主要內容包括復位電路的設計，共享ram的實現與控制，地址空間的分配以及板上eprom程序設計等。 -
In the hardware design, the paper completes modules ’ design like outside memory, patulous a / d, patulous d / a, rs232 communication, ecan communication, led control, keyboard control, distant control, emulation, reset, logic voltage switch, dsp supply power regulate and ac - dc power circuit, as well as room layout design like anterior panel, back panel etc. and dsp transfers data with peripheral equipments except outside memory using serial ports. besides, the whole circuit is configured in interrupt response. thus, it can meet system demand as well as take full advantage of tms320f2812 ’ s hardware resource. in the software design, the paper finishs programs like the interface programms intercommunicates with people, the distant control program, ad and da modules ’ control program, in addition, the paper select the velocity and acceleration state - feedback algorithm and is written in the program. the software design uses dsp integrate exploiting environment named ccs2. 2 of ti inc. as software instrument, and programs with the combination of c language and assembly language. moreover, in order to maintenance or modify the software expediently and shorten software ’ s exploitation time, the design adopt software modularization technique. finally, some air cylinder experiments are carried out to proved that the pneumatic controller is very practical
在硬體設計中，本文完成了片外存儲器擴展、 a / d擴展、 d / a擴展、 rs232通信介面、 ecan通信總線介面、液晶顯示控制、鍵盤控制、遠程控制、模擬、復位、邏輯電平轉換、 dsp工作電源校正電路和ac - dc電源等模塊設計以及控制器前面板、後面板等的空間布局設計。其中dsp與除外部存儲器的外圍設備之間的數據傳送全部採用串口通信，同時系統電路配置成中斷響應方式，這樣既滿足了系統要求，又充分利用了tms320f2812的硬體資源。在軟體設計中，本文完成了人機界面功能模塊、遠程控制模塊、 ad擴展模塊、 da擴展模塊、速度和加速度狀態反饋的控制演算法的程序設計。 -
There are six sub - modules in it : single - chip unit, data transfer unit, parallel data transfer / receive unit, serial data transfer / receive unit, system reset management and system power unit. this paper studies the design and realization of net interface module, mainly discusses design of data transfer unit ' s logic and the improvement of single - chip unit ' s software
論文首先從系統設計思想出發，對網路介面模塊的總體設計實現進行了研究，接著對作者主要研究的軟硬體分工協同設計中的軟體完善部分，邏輯設計部分，以及最後的邏輯測試、系統測試進行了重點論述。 -
For super - speed data sampling rate, design the dma bus of telecommunication method. aiming at the hardware system oneself request of security and stabilization, design the reset module, the power monitoring module, the serial eeprom module
為了保證具有高速的數據采樣率，設計了dma總線的通訊方式。針對硬體系統自身安全性和穩定的要求，設計了復位模塊、電源監控模塊、串列eeprom模塊。 -
Unlike an end statement, the stop statement does not reset variables or return you to design mode
不同於end語句， stop語句不重置變量或返回設計模式。 -
An idea is brought forth to design the total structure of the usb interface ip, the main control logic, the mcu interface ( the function is the same as the pdiusbd12 chip of the philips semiconductor ) and a dpll which is used to synchronize data and separate the clock. this paper also introduces packet recognition, transaction sequencing, sop, eop, reset, resume signal detection / generation, nrzi data encoding / decoding and bit - stuffing, crc generation and checking ( token and data ), packet id ( pid ) generation and checking / decoding,
提出設計了usb介面電路的整體構架，設計了usb的主要控制邏輯和與mcu的互連的介面（此介面與飛利普的usb介面晶元pdiusbd12兼容） ，也設計了一個數字鎖相環（ dpll ）來同步數據和分離時鐘，並對同步模式的識別、并行/串列轉換、位填充/解除填充、 crc校驗/產生、 pid校驗/產生、地址識別和握手評估/產生做了具體的分析。 -
To reduce the emi, reverse reset of the diode are studied, and design way about spike - killers and saturable inductors witch can suppress voltage and current spikes are showed. in this thesis, a transformer clamping full - bridge dc / dc converter is presented to salve the high input voltage. in this chapter, the operating principle is analyzed and experimental results have been showed on the 2kw converter
在處理高壓問題上，本文又提出了變壓器箝位高壓大功率dc dc全橋變換器拓撲方案，文中對其工作原理進行了分析，文中以一臺2kw的原理樣機對其工作原理進行了驗證，很好地解決了輸入電壓高的問題。 -
At the same time the clock chip pcf8563 and serial eeprom chip csi24c01 with reset and wdt circuit of i2c bus are used hi the system. they have not only provided the non - volatility data storage area, the supervision ability of power supply and mcu and the rtc, and its i2c bus structure has been simplified the circuit design
同時在系統中還使用了護c總線結構的時鐘晶元pcf8563和內置reset 、 wdt電路的串列eeprom晶元csi24coi ，它們不僅提供了電源和微控制器的監控功能、不揮發性的數據存儲區、實時時鐘，而且其護c總線結構簡化了電路設計。 -
When you drag input reset onto the design view surface, html markup like the following is inserted into your document
在將「 input （ reset ） 」拖動到設計視圖圖面上時，將會在文檔中插入如下類似的html標記： -
The design of this asic ( application specific integrated circuit ) is more advanced in power consumption, clock & calendar circuit and reset circuit making it more competitive than similar domestic products
該驅動電路asic的設計在功耗、時鐘日歷電路、復位電路等方面較國內同類產品有明顯改進，使得該晶元在市場競爭上將具有較大優勢。
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