sample-and-hold circuit 中文意思是什麼
sample-and-hold circuit
解釋
抽樣保持電路-
The column output circuit is realized by double sample and hold circuit which can effectively decrease fpn ( fixed pattern noise )
列輸出電路採用雙采樣電路,該電路能有效地消除固定模式噪聲。 -
A kind of gain error correction scheme for sample - and - hold circuit
保持電路中的一種增益誤差自校正方法 -
Sample and hold circuit
取樣保持電路 -
In front of the a / d converter in an analog conversion system is usually located a sample - and - hold circuit
在模擬量轉換系統中在模/數轉換器的前端通常都會有一個采樣-保持電路。 -
The sample and hold circuit is employed by the bottom plate sampling technique, which could not only cancel the charge injection error but also eliminate the effect of clock feed - through
采樣保持電路設計採用了電容下極板采樣技術,不僅有效地避免了電荷注入效應引起的采樣信號失真,而且消除了時鐘饋通效應的不良影響。
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