serial processor 中文意思是什麼

serial processor 解釋
串列處理機
  • serial : adj 1 連續的；一連串的；一系列的。2 按期出版的；（小說等）連載的；連續刊行的；連續廣播的。3 分期...
  • processor : n. 1. 〈美國〉農產品加工者；進行初步分類的人。2. （數據等的）分理者；【自動化】信息處理機。
  1. In the paper, we select the embedded micro - processor coldfire 5307 as system core. with it, the central control module is designed, and then be expanded with serial and ethernet circuits

    在方案中，論文選擇嵌入式處理器coldfire5307為系統硬體核心，圍繞它設計了系統的核心控制模塊。
  2. The characteristics and the design concepts of the transient electro - magnetic methods system design of predecessors will be analyzed detailedly in this thesis, on the foundation, the transient electromagnetic exploration system based on dsp ( digital signal processor ) and usb ( universal serial bus ) was designed, in which the transmitter and receiver have been integrated together for the sake of better operation for exploration

    在總結前人在系統設計的基礎上，成功設計和實現了一套基於dsp （ digitalsignalprocessor ）和usb （ universalserialbus ）技術的瞬變電磁探測系統，本論文就該系統的設計思想和原理進行了詳細論述和分析。
  3. Command line is in all simplicity a user interface which is based on lines of commands. you can say that it is a textual direct serial processor

    簡單的說，命令行就是基於成行的命令的用戶界面。您也可稱其為一個文本化指令序列處理器。
  4. A command line is in all simplicity a user interface which is based on lines of commands. you can say that it is a textual direct serial processor

    簡單的說，命令行就是基於成行的命令的用戶界面。您也可稱其為一個文本化指令序列處理器。
  5. Aim at the dtc ' s blemish mentioned above and the direction of dtc technique development, the dissertation put great emphasis on the work as follows, with an eye to exalt dtc system function : ( 1 ) a new speed - flux observer of an induction motor is proposed to enhance the accuracy of flux observing, which is an adaptive closed - loop flux observer and different from the traditions. a new adaptive speed - observation - way is deduced out according to the popov ' s stability theories ; ( 2 ) to improve the performance of dtc at low speed operation, we have to exalt the accuracy of the stator flux estimation and a new way of bp neural network based on extended pidbp algorithm is given to estimate and tune the stator resistance of an induction motor to increase the accuracy of the stator flux estimation ; ( 3 ) digital signal processor is adopted to realize digital control. an device of direct torque control system is designed for experiment using tms320lf2407 chip produced by ti company ; ( 4 ) bring up a distributed direct torque control system based on sercos bus, sercos stand for serial real time communication system agreement which is most in keeping with synchronous with moderate motor control ; ( 5 ) the basic design frame of the hardware and software of the whole control system is given here and some concrete problem in the experiments is described here in detail

    針對上面提到的直接轉矩控制的缺陷和未來直接轉矩控制技術發展方向，本論文重點做了以下幾個方面的工作，目的在於提高dtc系統的綜合性能： （ 1 ）提出一種新型的速度磁鏈觀測器，新型的速度磁鏈觀測器採用自適應閉環磁鏈觀測器代替傳統的積分器從而提高磁鏈觀測的精度，並且根據popov超穩定性理論推導出轉速的新型自適應收斂律； （ 2 ）改善系統的低速運行性能，主要從提高低速時對定子磁鏈的估計精度入手，提出了一種提高定子磁鏈觀測精度的新思路? ?利用基於bp網路增廣pidbp學習演算法來實時在線地修正定子電阻參數； （ 3 ）採用數字信號處理器dsp實現系統全數字化硬體控制，結合ti公司生產的tms320lf2407晶元，設計了直接轉矩控制系統的實驗裝置； （ 4 ）提出了基於sercos總線網路化分散式的直接轉矩控制系統， sercos （ serialrealtimecommunicationsystem ）是目前最適合同步和協調控制的串列實時通信協議； （ 5 ）基本勾勒出整個控制系統的硬體和軟體設計基本框架，詳細描述一些實驗中的具體的細節問題。
  6. Lastly, this paper discussed the realization of the three sidelobe algorithms mentioned above using adsp 21160 which is a product of adi sharc serial digital signal processor

    最後，採用adi公司sharc系列dsp晶元adsp21160n探討了偽隨機fsk / psk信號旁瓣抑制演算法的dsp實現。
  7. Embedded system is a computer system, which is focus on application, based on computer technology, and its software and hardware could be pruned, besides embedded system has particular requirement for its reliability, cost, volume and power consume. embedded system is relative to computer system structure, encode theory and work theory, and come down to all kinds of computer interface and memory technology, such as serial and network interface, flash and sdram memory technology. the processor and interface and memory device will be difference when referring to different applications, but, as far as the researching and developing method of embedded system, they are generally same

    嵌入式系統是以應用為中心、以計算機技術為基礎、軟硬體可剪裁併對功能、可靠性、成本、體積和功耗都有嚴格要求的專用計算機系統，涉及計算機系統的體系結構、編譯原理和工作原理，涉及到計算機的各種介面和存儲應用，如常用的串口、網路控制等介面和flash 、 sdram等存儲技術，此外，因嵌入式系統的應用不同，處理器和介面及存儲設備都會有所不同，但就嵌入式系統的研究與開發方法來說有許多相同之處，因而深入研究和設計某種嵌入式系統具有深遠的意義。
  8. It has high efficiency advantage while network processor transfers packet editing commands between the packet editor and packet editing command generator, because it is a new parallel command transferring mode but net a serial mode

    這種機制使得在網路處理器的包編輯器和包編輯命令發生器之間傳遞包編輯命令的效率得到了大幅度的提高。
  9. The task in the paper comprises two parts. the software design procedure works as follow, program the drivers for module on pc with cvi, generate the corresponding ddl and then edit the test serial and invoke the ddl by designing soft panel with vc + + 6. 0. thus facilitate users to control module to conduct high speed data test. the hardware design procedure works as follow, design vxi message based interface circuit and plesio - fdc circuit with fast data transport function on xc2vp30, a virtex - ii pro series fpga chip designed by xilinx company which integrates power - pc processor

    筆者負責的工作包括軟體設計和硬體設計兩部分:軟體設計是用cvi工具編寫模塊在pc機上的驅動程序，生成動態連接庫，再用visualc + + 6 . 0設計軟面板，實現測試矢量的編輯和動態連接庫的調用，讓用戶很方便地控制模塊進行高速數據測試;硬體設計是在xilinx公司的一片集成了power - pc處理器的virtex - iipro系列fpga晶元xc2vp30上完成vxi總線的消息基介面電路設計和具有快速數據傳送功能的準fdc電路[ 1 ] [ 2 ]設計。
  10. The communication and data processing system of the traditional fault recorder usually base on serial port and single - chip processor. they always have low speed and bad reliability, so these kinds of recorder ca n ' t get record data at real - time and ca n ' t take effect enough as the guarantee of the power system ' s safe operation

    早期微機故障錄波器的通訊及數據處理系統多採用串口通訊和單片機，其速度慢、可靠性不高，無法實時的得到錄波信息而發揮錄波器在電力系統安全運行中應有的作用。
  11. Deep discussions are offered for design and realization of several key technology, such as serial communications bsp design and realization, frame relay protocol design and realization, design and realization of interface between vxworks rtos and char & network devices, and powerpc860 ' s communications processor module

    對很多設計與實現中的關鍵技術，如串列通訊bsp的設計與實現、幀中繼協議的設計與實現、 vxworks嵌入式實時操作系統與字元設備和網路設備的介面方式的設計與實現、以及powerpc860處理器中的通訊處理器模塊（ cpm ）進行了較為深入的討論。
  12. Based on s698 technology, obt - devsys - s698 is one of the serial s698 - mil application development systems including 32 - bit embedded processor with 32 64 - bit fpu 160mhz processing speed sram memory controller flash memory controller uart ps 2 led interrupter controller, etc. the bus interfaces is composed of i2c spi magnetic card interface and ic card interface. obt - devsys - s698 carries on the advantages of s698 serial module such as compact structure and reasonable composition

    Obt - devsys - s698是s698系列嵌入式處理器開發板中的一員，其上包括：具有32 64 - bit浮點運算單元的32 - bit嵌入式處理器，主頻160mhz ， sram存儲器， flash存儲器具有三路uart介面，一路ps 2介面， led發光二極體控制電路，中斷操作按鈕其外擴總線包括i2c總線介面spi總線介面磁卡介面智能卡介面等。
  13. The receiver unit mainly consisted of the digital down converter, matched filter, integration and dump module, power detector, symbol tracking processor, differential demodulator, parallel - to - serial conversion module, output processor and afc module

    接收部分主要有數字下變頻、數字匹配濾波器、積分清洗、功率檢測、符號跟蹤處理、差分解調、並串處理、自動頻率跟蹤處理等模塊。
  14. Amdahl s law governs the speedup of using parallel processors on a problem versus using only one serial processor

    Amdahl法則揭示了使用并行處理器來解決問題與只使用一個串列處理器來解決問題的加速比。
  15. Psn processor serial numbers

    處理器序列號
  16. The simulation of the addressing mode provides the possibility for the instruction simulation, and the simulation of the interrupt, timer and serial port lets the simulator implement the functions of the interrupt, timer and serial like a processor, and the program control simulation provides the possibility for running the program. this function is also the base for debugging program, which can set step running mode, set break points by using this program

    尋址方式的模擬為指令的模擬提供了可能，中斷、定時器和串列口的模擬使模擬器可以象處理器一樣完成中斷功能、定時功能和串列通訊功能，程序控制的模擬為程序運行提供了可能，這一功能又是調試程序的基礎，通過這個程序程序可以單步執行，設斷點執行。
  17. It uses svf ( serial vector format ) files to describe the user ' s digital circuit, and makes the processor of embedded system explain svf files to configure the plds over the internet

    文中利用符合工業標準的svf文件描述數字電路的配置信息，通過嵌入式系統解釋該文件完成對可編程器件的遠程配置。
  18. This dissertation refers to several typical examples of existing multipliers and accomplishes a specific multiplier, which can meet the performance requirement of t2181 processor. the designs of flexible power management, powerful serial ports and memory architecture are also included in this dissertation

    乘累加器中的乘法器是影響系統性能的關鍵數據路徑，本文參考了現有的幾種典型乘法器結構，針對t2181dsp處理器的性能要求，提出了乘法器的改進結構，在此基礎上實現了高性能的乘累加器，為系統整體性能的提高奠定了基礎。
  19. Bit - serial associative processor

    位串列相連處理機
分享友人
分享到 Line

分享到臉書