signal clock 中文意思是什麼

signal clock 解釋
信號鐘
  • signal : n 1 信號，暗號；信號器。2 動機，導火線 （for）。3 預兆，徵象。adj 1 暗號的，作信號用的。2 顯著的...
  • clock : n 1 鐘；掛鐘，座鐘，上下班計時計。2 〈俚語〉記秒錶，卡馬表；〈美俚〉〈pl 〉駕駛儀表，速度表，里程...
  1. This paper reviews the signal transduction pathways regulated by light in the biological clock

    本文綜述了光信號對高等植物生物鐘的調節作用和轉導途徑。
  2. The tft lcm driver signals were enable signal and fiducial clock signal, which were strict with synchronization

    驅動信號主要為使能信號和基準時鐘信號，並要求二者具有嚴格的同步性。
  3. A clock signal with 1 million pulses per second is referred to as a 1 megahertz.

    每秒鐘有一百萬個脈沖及時鐘信號，也稱兆赫（）時鐘信號。
  4. A clock signal with 1 million pulses per second is referred to as a 1 megahertz

    每秒鐘有一百萬個脈沖及時鐘信號，也稱兆赫（ ? ）時鐘信號。
  5. The speed with which your microcomputer executes programs will vary linearly with the speed of your clock signal.

    你的微型計算機執行程序的速度將與你的時鐘信號的速度成線性關系。
  6. Electric - controller is nubbin in developping. we are based on designing to structure of circuit, we are dead against in time and stabilization for controlling and communications, precision and rapidity for transformation etc. we have completed to select on microprocessor, clock - frequency and a / d transfer. it carry out transformation for valve position signal, and select on solid - switch ac

    在控制器的電路結構設計的基礎上，考慮到通訊、控制的及時、穩定、轉換的精度和速度等幾方面，主要完成對微處理器的選擇、時鐘頻率和a d轉換器的選用，閥位變送功能的實現，固態交流開關和顯示器的選擇等。
  7. The three - order modulator has a 2 - 1 cascaded structure and 1 - bit quantizer at the end of each stage, the modulator is implemented with fully differential switched - capacitor circuits. and then, the discussion will begin by exploring the design of various circuit blocks in the modulator in more detail, i. e., ota, switched - capacitor integrator, quantizer, two - phase non - overlapping clock signal, etc., at the same time, these circuits will be simulated in spectre and hspice. at last, the whole cascaded modulator will do behavioral level simulation by matlab soft and simulink toolbox

    本論文中，首先介紹模數轉換器的各種參數的意義，以及一階sigma - delta調制器和高階sigma - delta調制器的原理;給出解決高階單環sigma - delta調制器不穩定性的方案，引入級聯結構調制器，特別針對級聯結構調制器中的失配和開關電容積分器的非理想特性進行詳細的討論;本設計的sigma - delta調制器採用2 - 1級聯結構和一位量化器，調制器採用全差分開關電容電路實現;同時對整個調制器的各個模塊進行了電路設計，包括跨導放大器、開關電容積分器、量化器、兩相非交疊時鐘等，並利用hspice和spectre模擬工具對這些電路進行模擬測試;最後，利用matlab軟體和simulink工具對整個級聯調制器進行行為級模擬。
  8. Let ' s set the clock by the radio time signal

    咱們照著收音機的報時信號把鐘對一對。
  9. The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing

    本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據幀存模塊、基準時鐘產生模塊、 d a編碼模塊、 i ~ 2c總線控制模塊等部分軟、硬體設計及調試。其中a d解碼模塊採集模擬電視信號實現視頻解碼； fpga視頻處理模塊對解碼后的數據進行去噪處理的同時還負責系統的邏輯控制；視頻數據幀存模塊為大量高速的視頻數據提供緩沖區；基準時鐘產生模塊通過輸入基準視頻信號為系統提供精確的相關同步信號； d a編碼模塊在視頻處理模塊的控制下把數字視頻數據轉換成復合電視信號供顯示用： i ~ 2c總線控制模塊模擬i ~ 2c總線時序實現對系統中編、解碼晶元的初始化。
  10. ( 2 ) both the circadian clock and the light signal may affect the circadian expressions of the mt1 and mt2 genes. the mt1 is more sensitive to variation with the structure of light and dark, but the mt2 is more affected by the time length of light exposure

    光照對scn及淋巴細胞中鐘相關基因晝夜表達節律的影響中文摘要血和血的晝夜節律性表達同時受生物鐘及光信號的影響，但mt受光制構成的影響較大，而航2受光照時間長短的影響較大。
  11. The clock recovery block of usb2. 0 transceiver macrocell consists of phase locked circuit, such as pll and dll ( delay locked loop ). this block use external crystal 12mhz sin signal to produce 60mhz, 120mhz, 480mhz clock signal, and can recover colock signal form date wave. it can support 480mbps ( hs ) and 12mbps ( fs ) word speeds as defined in usb2. 0 specification.

    目的是用鎖相環電路? pll和dll （延遲鎖相環）實現usb2 . 0收發器宏單元utm的時鐘恢復模塊。其中pll環路構成的時鐘發生器將外部晶振的12mhz正弦信號生成60mhz 、 120mhz 、 480mhz等本地時鐘信號。 dll環路依據本地時鐘信號對外部數據信號進行時鐘恢復。
  12. The main research contents of this dissertation are shown in the following : ( 1 ) introduce one method of use the counting pulse to develop ie measuring system and new method of using the high frequency clock signal to divide the space pulse

    本文主要研究內容如下: （ 1 ）系統論述了一個脈沖計數方式的ie測量系統的測量原理，闡述了一個採用高頻的時鐘信號細分空間脈沖的新型細分方法。
  13. The level adjustment circuit 100 lowers the clock signal input to the first clock terminal ck1 by a predetermined value from h level and provides the signal to the gate of the transistor q5

    電平調節電路100將送往第一個時鐘終端ck1的時鐘信號從h電平降低一個預定值，並將此信號送往晶體管q5的輸入端。
  14. Oscillator generated a wave with frequency 132 khz as the clock signal

    振蕩器電路產生一個頻率在132khz附近抖動的矩形波作為整個電路的時鐘信號。
  15. Gps is a planet wireless conductance system which is global and all - weather, gps can offer high precision time orientation information to infinite user, clock precision reachs 10 ? 6 magnitude 。 not only changes traditional time method of quartz crystal clock, but also replaces wireless shortwave and even more lowfrequency signal and tv signal whose overlay range is limited and low precision, offers advantage to geology field task, achieve automatization and high precision of seismic flow observation

    利用gps授時信號全方位、全天候、連續性、實時性和高精度的特點，以gps信號為基準來校準本地時鐘（晶體振蕩時鐘或原子鐘） ，將gps接收機輸出信號的長期穩定度和恆溫晶振的短期穩定度相結合，應用大規模可編程邏輯器件，設計和實現了由pc104控制的實時在線授時系統。
  16. The precise clock source is crystal oscillator made of 74hc04 ; the mute circuit can conceal the error and solve the problem of noise ; the antenna switching circuit in the receiver is to select one antenna from two which receives signal better. it can improve the quality of the receiving audio signal, restrain the noise effectively and promote the system performance

    高精度的時鐘源是由74hc04構成的晶體振蕩器;靜音電路將出錯的音頻信號進行差錯掩蓋，很好地解決了噪聲問題;接收機採用兩副天線切換工作，提高了音頻信號接收質量，有效地抑制干擾，提升了系統的性能。
  17. The transition from voltage to no voltage is referred to as the trailing edge of a clock signal.

    電感從一定值下降到0值的躍遷叫做時鐘信號的后沿。
  18. The device always generates the clock signal

    時鐘信號總是由設備端生成的。
  19. Real - time power angle measurement of a synchronous generator based on gps clock signal and tachometer

    時鐘信號的發電機功角實時測量方法
  20. This paper gives a time - synchronization technique bases on gps time service signal which is used in broad band seismic recorder 。 by world coordination time offered by gps - - utc ( usno ), adjust local clock base on gps signal, gain high nicety clock signal, clock precision reachs 10 - 6 。 this clock is the time source of broad band seismic recorder, bring the whole seismic recorder works in same time base. 1pps time base with high stability can be used as in - phase, spring, time and start - stop of every collection mode, while the scale under second make a precise time mark to receive data of broad band seismic recorder

    針對接收機中gps信號的噪聲進行kalman濾波軟體處理， kalman濾波可以對gps信號與本地晶振時鐘的時差數據在大噪聲中進行平滑，在較短時間內估計出高精度的時差數據。系統消除了gps秒脈沖信號的ms級隨機誤差，把晶振秒脈沖的長期穩定度鎖定到gps信號的穩定度上;在gps信號失效時給出了可行措施，能夠保證在任何情況下產生一個穩定、高精度秒脈沖信號，誤差在1 s內。
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