source decoder 中文意思是什麼

source decoder 解釋
信源譯碼器
  • source : n 1 源頭,水源,源泉。2 根源,本源;來源。3 原因;出處;原始資料。4 提供消息的人。5 血統。vt 〈美...
  • decoder : n. 譯電員;譯碼機;解碼器;判讀器。
  1. Dvb / mpeg - 2 transport stream multiplexer / demultiplex takes an important role in digital video broadcasting system. it can combine several transport streams from source encoder into a single transport stream to transport channel, or demultiplex trasnsport stream into one program sorce to source decoder. its performance has a great influence on the program transmission ability of hdtv system and the decoding quality of decoder in hdtv receiver. mpeg - 2 system multiplexer signalized video, audio, host data and so on to fixed length packet type for making transport stream

    Dvb mpeg - 2傳送流復用解復用是數字電視廣播系統中的重要組成部分之一,它將從信源編碼器輸出的多路節目源復用成一路傳輸流送入傳輸通道,或者從通道中包含多路節目源的一路傳輸流中解復用出一路節目送到解碼器解碼。
  2. Compared with analog video decoder, digital video decoder has advantage of smaller area and higher quality, and offers better source for video processor

    數字視頻解碼器給視頻處理電路提供了高質量的數字信號源,相比模擬解碼器,具有面積小、質量高的優點。
  3. This is the core of the issue. in this section we designed the cells of the dac, including the decoder circuit, bandgap reference voltage circuit, current source circuit and switched circuit etc. the fourth chapter the simulations of circuit and errors of the dac are discussedi, so the simulation waveforms are plotted on the paper and we must take the error corrections and minimize ways

    對于整個d a轉換器的具體結構和電路設計放在第三章,這也是本文的核心之處,對d a轉換器的整體電路及主要電路單元如:數字譯碼電路、帶隙參考電壓源電路、電流源產生電路、差分電流開關電路等進行詳細地分析和設計。
  4. Chapter 3 presents the design and implementation of memory management of rtos for the hdtv integrated source decoder chip

    第三章具體描述應用於hdtv信源解碼晶元的實時操作系統存儲管理策略的設計及實現。
  5. In this thesis, we research and implement me memory management methods of rtos for the hdtv integrated source decoder chip

    本文以hdtv信源集成解碼晶元為開發背景,研究和實現了應用於該soc晶元的實時操作系統的存儲管理策略。
  6. This paper will give a discussion of the method of asic design and analysis the hdtv integrated source decoder with embedded risc core and a improved de - interlacing algorithm for asic design

    本文討論了asic設計方法,以及嵌入式risc核在hdtv信源集成解碼器中的設計研究和面向asic設計的視頻解隔行演算法優化。
  7. When the secure system is cracked by the hacker, the enterprises must change all the source decoder which has been placed in the stb, it will cost much more than the followed scheme, smart card scheme

    如果將解密模塊從解碼器中分離出來,置於安全性能極高的智能卡中,一旦系統安全受到威脅,僅通過更換相對廉價的智能卡,就會避免數字電視運營商遭受巨額經濟損失。
  8. However, in the part of the software, the schemes to programme coder and decoder are expatiated separately and the final flow charts are drawn after that. during the design of the coder, the selection of the information source and the modulation is discussed. according to the characteristic of the multi - phase modulation ml

    在軟體實現部分,分別詳述了編碼器和譯碼器的編程方案並給出了最終實現的流程圖:編碼器的設計中論述了信息源和調制方式的選擇方法;而對譯碼器的最大似然演算法則根據多相調制的特點進行了演算法簡化和實現。
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