submicron technology 中文意思是什麼

submicron technology 解釋
亞微米技術
  • submicron : 次微粒直徑小於1微米
  • technology : n. 1. 技術，工程，工藝。2. 製造學，工藝學。3. 術語（匯編）。
  1. Therefore, cleaning of micron and submicron contaminate particles has become an important procedure in the process of glass substrate with super - smooth optical surface, and also become one of the key solving technology to ensure the quality of substrate

    表面清洗是光學基片製造中必不可少的工序之一，隨著表面污染微粒的容限提高到微米甚至亞微米級，傳統的清洗技術難以滿足要求，已經成為制約基片性能提高的主要技術難題之一。
  2. In iddq detecting area, the basic principle and strongpoint of iddq testing are introduced. then, the influence of deep - submicron technology on iddq testing is explained. and the improved iddq testing methods are also given

    在靜態電流檢測方面，首先闡述了iddq檢測的基本原理以及優缺點;分析了深亞微米技術對iddq測試的影響以及iddq的改進方法。
  3. At present the manufacture of surface acoustic wave use the technology of the final submicron. a series of the devices of low insertion loss, high q saw rayleigh surface acoustic wave resonators or stws that insertion loss has less than 5db, load quality factor ( ql ) is more than 1000 on the quartz piezoelectric with zero of first temperature factor in the research. these difference frequencies are 60mhz, 280mhz, 739mhz and 1ghz of normal frequency and at also surface acoustic wave. using 1. 25db noise factor amplifier, careful design curcuit, good setting printed curcuit board, and using the 1ghz surface transverse wave resonator as frequency element, researching the low phase noise surface acoustic wave with sideband phase noise near ? 120dbc / hz deviating 1khz on carrier, spurious suppress with 80db

    本研究採用一階溫度系數為零的壓電石英基片上製作出損耗小於5db 、有載品值因素（ ql值）超過1000的一系列低損耗、高q值聲表面波rayleigh波或stw諧振器，頻率分別為60mhz 、 280mhz 、 739mhz和1ghz等不同頻率的高性能聲表面波諧振器。並採用噪聲系數為1 . 25db的低噪聲系數放大器，精心設計電路，優化設計布置印製電路板，用標稱頻率為1ghz的聲表面波諧振器為頻率控制元件，製作出在偏離載頻1khz處的單邊帶相位噪聲近- 120dbc / hz 、雜波抑制達80db以上的低相位噪聲聲表面波振蕩器。
  4. With the recent advent of deep submicron technology and new packing schemes, the components in the integrated circuit are often not rectangular. on the basis of the representation of corner block list, we propose a new method of handling rectilinear blocks. in this paper, the handling of the rectilinear blocks is simplified by transforming the l t - shaped block problem into the align - abutment constraint problem

    尤其在深亞微米工藝設計中， ip模塊的廣泛使用和新的封裝工藝的使用使得集成電路器件並不局限於矩形的模塊，如數據電路模塊data path block由於其相互關聯的控制關系使其具有特殊的形狀l t型，這使得電路設計中需要考慮l t型模塊的處理。
  5. Progress and research on interconnects crosstalk in deep submicron technology

    我們的研究是基於k eff模型進行的。
  6. With deep submicron technology, an embedded system can be integrated into a single chip and becomes " system on chip " for many applications

    隨著微電子技術中的深亞微米技術的發展，嵌入式系統可以被集成到一塊晶元上，形成片上系統「 soc 」 。
  7. As manufacturing technology shrinks to the deep submicron process, the tolerance of process variation becomes an important subject in the clock tree design

    摘要隨著製程技術縮小至深次微米，製程變異容忍度在時鐘樹設計上已成為一個重要的課題。
  8. As the technology entered the era of deep - submicron ( dsm ) technologies, the second order effects of cmos device are having more and more influence on the performance of the cmos logic circuits. this dissertation compared the performance of four popular logic families against mcml under dsm technology

    隨著工藝發展進入深亞微米時代， cmos器件的二階效應對電路的性能產生著越來越重要的影響，論文首先對比討論了mcml電路和其它各種常用邏輯電路在採用深亞微米器件時的性能表現。
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