test pattern generator 中文意思是什麼
test pattern generator
解釋
測試碼模式發生器-
The thesis then introduces top - to - bottom schemes, which discuss the functional design of hdtv test pattern signal generator according to the tasks and platform of the system, and develops the function of subsystems. the thesis analyses the theory and mathematic model of hdtv test signal, and studies the signal generating scheme called single - fpga and multi - prom, and describes in detail its key modules such as configuration connecting, prom routing, control and switch timing design and so on. the single - fpga and multi - prom scheme increases the number of prom to reduce the degree of fpga demanded, thus
論文分析了hdtv測試信號的原理及數理模型，提出了一種以單晶元多配置為特色的信號生成方案，並對該方案的配置連接、晶元選路、控制切換時序設計等關鍵模塊進行了詳細敘述，該方案以增加配置晶元數量來降低對主晶元要求，不但降低了產品成本，還使各測試信號的代碼編寫和產生相對獨立，有利於合理使用晶元資源，實現多種復雜的hdtv測試信號，縮短開發周期。
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