trigger-delay circuit 中文意思是什麼

trigger-delay circuit 解釋
觸發延遲電路
  • trigger : n （槍上的）扳機；【機械工程】扳柄；閘柄；制輪（機），制滑器；【物理學】觸發器，引爆器；【化學】...
  • delay : vt 延遲，拖延，耽擱。 We ll delay the party for two week 我們要把會期延遲兩周。 The train was del...
  • circuit : n 1 （某一范圍的）周邊一圈；巡迴，周遊；巡迴路線[區域]；迂路。2 巡迴審判（區）；巡迴律師會。3 【...
  1. The pulse width trigger circuit, trigger delay circuit are discussed. and a new kind of peak detection module which is implemented by verilog hdl in fpga and greatly enhances the performance of catching glitch is discussed in the dissertation. the waveform recorder function accomplished in the scopemeter can test, monitor slow analog signals and record the characteristic value of signals continuously for a long time

    本文討論了脈寬觸發電路和觸發釋抑電路的實現，採用veriloghdl在fpga中實現了一種峰值檢測模塊，提高了示波表的毛刺捕捉能力，設計的波形記錄（ recorder ）功能模塊能夠對輸入的模擬信號進行長時間連續不斷的采樣量化，並記錄波形數據和及時送顯示。
  2. The input voltage of the piezoresistive transducer, gain, sampling frequency and negative delay can respectively be graded through programming. the stored system is specially designed to have two modes of trigger ( namely, external trigger through wire breakage and inner trigger through overpressure signal ), reading software and interface circuit that are of

    該測試系統可通過編程選擇傳感器供電電壓（兩檔） 、放大倍數（四種） 、采樣頻率（四種） 、負延遲（四種） ；同時具有斷線外觸發和超壓信號內觸發兩種觸發方式；讀數的軟體和介面電路都具有串併兼容特性；系統還具有狀態自檢和定時上電等功能。
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