two-level logic 中文意思是什麼
two-level logic
解釋
二級邏輯-
This paper mainly aims at the characteristics of the hardware and software structure of the parallel computer on satellite, and has fulfilled researches of fault tolerant technique in three aspects of control theories and engineering : the first research of the system level fault - tolerant module is based on the system structure of the parallel computer on satellite, a kind of cold backup module and a kind of hot backup module for multiprocessor computer have been put forward. then the research of software fault tolerant technique which is based on the operate system named rtems has been carried, the mission level fault - tolerate arithmetic and the system level fault - tolerate mechanism and strategies based on the check point technique have been put forward, at the same time the self - repair technique of software which has used the technique of system re - inject has been studied. finally the technique of components level fault - tolerant based on fpga has been studied, a kind of two level fault - tolerant project which aims at the fault - tolerant module of the parallel computer on satellite has been put forward, and the augmentative of circuit that project design realization need is little, this project can avoid any breakdown of any part logic circuit of the fpga
本課題主要針對星載并行計算機體系結構及軟體結構的特點，從如下三個方面進行了容錯控制理論研究和實踐工作:首先進行了基於星載多cpu并行計算機體系結構的系統級容錯模型研究，提出了一種多cpu冷備份容錯模型和一種多cpu熱備份容錯模型;然後進行了基於rtems操作系統的軟體容錯技術研究，提出了任務級容錯調度演算法以及基於檢查點技術的系統級容錯恢復機制和策略，同時研究了利用系統重注入進行軟體在線自修復的容錯技術;最後研究了基於fpga的部件級容錯技術，提出了對容錯模塊這一星載并行計算機關鍵部件的兩級容錯方案，實現該方案所需增加的電路少，可避免板級晶元以及fpga晶元內部任何邏輯發生單點故障。 -
The risc mcu core is based on harvard architecture with 14 - bit instruction length and 8 - bit data length and two - level instruction pipeline the performance of the risc mcu has been improved by replacing micro - program with direct logic block
設計的riscmcu採用14位字長指令總線和8位字長數據總線分離的harvard結構和二級指令流水設計，並使用硬布線邏輯代替微程序控制，加快了微控制器的速度，提高了指令執行效率。 -
This paper focuses on the combitional logic synthesis including two level logic synthesis and multiple level synthesis. and it is a part of control flow synthesis in a controller synthesis system. in this paper following problems are proposed and implemented : ( 1 ) implement the algorithm " espresso ", and make it suit to the system
本文所完成的組合邏輯綜合的研究與實現是控制流綜合系統的一個組成部分，其中包括： （ 1 ）引入並實現了兩級邏輯綜合的「 espresso 」演算法，定義與系統相適應的數據結構，重新測試各種開關條件，使之適用於系統的實際應用。 -
Because the signal which serial interface output of mcu is ttl logic level, it is essential to transform ttl electrical level to rs - 232 electrical level when the mcu is communicated with pc. in this paper the universal rs232 / 485 electrical level converting circuit board is designed. it can realize data transmission by the two communication level manner
因為單片機的串列輸出介面輸出的電信號是ttl電平，這樣在和上位機通信時需要通過轉換電路對其電平進行轉換，所以在本課題中設計了通用的rs - 232 485電平轉換電路板，可以實現兩種不同電平的數據傳輸，通過最後的實驗驗證，該電路板能實現所要求的功能，傳輸信號可靠準確。 -
Bbl back - side bus logic. logic for interface to the back - side bus for accesses to the internal unified level two processor cache
後端總線邏輯。訪問內部統一二級處理器緩存的後端總線介面邏輯。 -
Two abb frequency converters and a siemens programmable logic controller ( plc ) are with the lower - level computer and industry computer are with the host computer. the communication between with the host computer and low - level computer not only translate the system condition, but also send the control instruction. the system condition is shown with chinese window in the host computer, and the constant stress function is realized through the frequency converter part
2臺變頻器和plc作為下位機設備，工控機作為上位機集中控制，上下位機之間通過通訊，把系統當前狀態、當前給定通過上位機來綜合判斷，並通過上位機以漢化界面形式予以顯示，而下位機的變頻部分則實現管網的恆壓功能， plc實現4臺水泵機組邏輯控制和定期巡檢，及部分故障綜合報告。 -
As the application of distributed computing is used much more widely ， distributed database becomes a significant part of information management it avoids a lot of disadvantages of conventional centralized database ， and is applicable to many situations distributed database is a set of data which is the unity logic ， but in fact these data is located on different sites it is of high availability ， easy expansibility ， high concurrency ， high efficiency and etc in distributed system ， data redundancy is a method to improve the speed of query and the availability of system distributed query should shield the lower level details of data redundancy from end users ， distributed transaction should ensure data from disaccord this paper introduces basic conceptions of distributed database firstly ， discusses distributed transaction and concurrent control ， describes the development prototype mysql ’ s characters ， architecture and executive mechanism ， then shows the skeleton model of dpsql and exposes the strategy and algorithm of distributed query and distributed transaction ， at last analyzes the extra expenses and response delay of distributed processes this paper exposes the implementation mechanism of distributed query and distributed transaction emphatically distributed query uses the strategy of “ read one ， write a11 ” s0 in such a system if user ’ s requests are read - - only for the most part and the distribution of data redundancy is plausible ， efficiency is very high distributed transaction uses two - 。 phase commit protocol to ensure the consistency of global data ， which has less communication overhead
分散式查詢需要向用戶屏蔽數據冗餘分散的底層細節，分散式事務處理要保證全局數據完整，這都是傳統集中式數據庫不曾面臨的問題。本文首先介紹了分散式數據庫的概念性問題；接著討論了分散式事務涉及的定義及演算法；然後描述了dpsql的原型mysql的特性、結構和執行機制；繼而給出了dpsql的梗概模型，闡述了實現分散式查詢和分散式事務處理的策略及演算法；最後分析了進行分散式處理給系統增加的額外開銷和客戶端的額外響應延遲。本文重點描述了分散式查詢和分散式事務處理的實現機制，分散式查詢採用」讀一個寫全部」的本地優先策略，在讀操作頻繁的系統中，只要庫的分佈合理，單機效率極高，幾乎無任何附加開銷和延遲，而以整個系統的角度看來，吞吐量就更是優于單機系統；分散式事務處理採用兩階段提交協議，通信次數較少並能確實保證副本一致。
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