video bus 中文意思是什麼

video bus 解釋
視頻總線
  • video : n. 電視；視頻；影像。adj. 電視（用）的，視頻的，錄像的。
  • bus : n （pl busses buses）1 公共馬車；公共汽車；客機。2 〈口語〉汽車，機器腳踏車；飛機。3 【電學】信息...
  1. Thus, we propose a multi - channel real - time video surveillant system based on pci bus

    基於上述原因，我們開發了一個基於pci總線的多路視頻實時監控系統。
  2. The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing

    本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據幀存模塊、基準時鐘產生模塊、 d a編碼模塊、 i ~ 2c總線控制模塊等部分軟、硬體設計及調試。其中a d解碼模塊採集模擬電視信號實現視頻解碼； fpga視頻處理模塊對解碼后的數據進行去噪處理的同時還負責系統的邏輯控制；視頻數據幀存模塊為大量高速的視頻數據提供緩沖區；基準時鐘產生模塊通過輸入基準視頻信號為系統提供精確的相關同步信號； d a編碼模塊在視頻處理模塊的控制下把數字視頻數據轉換成復合電視信號供顯示用： i ~ 2c總線控制模塊模擬i ~ 2c總線時序實現對系統中編、解碼晶元的初始化。
  3. Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper, carried on intact summing up to the data in the system, having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram, give solution that many pieces of sdram works togetherses of realizing heavy capacity, designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus, optimize back end state machine design and urge procedure making with lower, giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices, due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal, method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo

    本文首先對數字減影血管造影（ dsa ）成像系統的組成結構和數據流向進行了深入研究和分析，並對系統中的數據流向進行了完整的歸納和總結，給出了x線數字成像系統中的高速大容量數據通道的設計方案；在對sdram的控制方式做了深入探討后，給出了實現大容量多條sdram共同工作的解決方案，在此基礎上設計了大容量幀存板實現對圖象數據進行高速存儲；通過對pci總線介面的深入研究，優化後端狀態機設計和低層驅動程序開發，給出了完整的pci介面方案實現高速dma數據傳輸，完全可以滿足視頻傳輸要求；深入研究了基於大規模可編程器件的數字系統設計方法，針對通用fifo使能信號漂移、輸出數據難于建立和保持等設計難點，提出了利用fpga中的鎖相環提供多個時鐘相移的信號來提高系統穩定性的解決方案，從而實現利用fifo來協調系統各模塊之間的數據高速傳輸。
  4. Audio, video and audiovisual systems - interconnections and matching values - connector and cordset for domestic digital bus

    音頻視頻和視聽系統.互連和匹配值.第4部分:內部數字總線用連接器和接線點
  5. Audio, video and audiovisual systems - interconnections and matching values - part 4 : connector and cordset for domestic digital bus

    音頻視頻和視聽系統.互連和匹配值.第4部分:內部數字總線用連接器和接線點
  6. Audio video bus av bus physical layer and media specification

    視頻音頻母線物理層和介質規范
  7. The second part of this paper will introduce the hardware design for the enhanced progressive - scan video capture system based on the pci bus

    本文的第二部分介紹了基於pci總線的逐行掃描視頻採集系統硬體部分的設計。
  8. Firstly, this paper makes a detailed study on the field control bus system ( pcs ), including the characters of pcs by comparing fcs and dcs, model networking of pcs and several popular field bus, then put forward a question for discussion combining embeded internet technology and field bus and measure and control networking model based embeded internet technology is constructed. secondly, it studies embeded system including the core of hardware ? mbeded microprocessor and real time operation system. thirdly, the method of realizing embeded internet is discussed for emphasis, and difficulty of ehernet application in industry measure & control system is analysed. an instance of measure & control networking system based embedded ip is given. finally, the author designed a networked remote video surveillance system based embedded web server, c / os - ii is sacled and ported into the embedded microprocessor at89c51. based on the c / os - ii rtos, tcp / ip protocol suite and application program is designed in detail. the system w orks well that improves that the embedded internet technology will be widely used in modern measure & control networking system and has extend values

    本文首先分析了現場總線系統（ fcs ）與傳統集散控制系統（ dcs ）相比具有的特點、 fcs的網路體系結構，介紹了幾種流行的現場總線，提出了將嵌入式internet技術結合現場總線構建現代測控網路的課題；在此基礎上，構建了基於嵌入式internet技術的測控網路結構模型；深入研究了嵌入式系統的核心硬體?嵌入式微處理器，通過對比普通操作系統，描述了嵌入式實時操作系統的特點；重點研究了實現嵌入式internet的四種實現方法，並分析了以太網在工業測控系統中應用的難點，給出了一個基於嵌入式ip的網路測控系統實例；最後，研究與設計了一個基於嵌入式web服務器的遠程網路視頻監控系統，該嵌入式web服務器利用目前成熟的嵌入式實時操作系統c / os - ，通過對c / os -進行適當的裁剪、修改與移植，在at89c51嵌入式微處理器上實現了tcp / ip協議棧及應用程序，系統的成功運行證明了本文研究成果的有效性，也表明嵌入式internet技術在現代測控網路系統中具有廣闊的應用前景和推廣價值。
  9. The card is a independent instrument which can do white - black video image digitization, eompresing, coding and transmit the compressed image data to host computer by rs - 485 bus, so the card can solve the bottle - neck problem of the video supervise system completely

    該壓縮卡是一個獨立的視頻圖像壓縮和傳輸設備，它能直接對黑白電視信號進行數字化和壓縮編碼，並通過rs - 485總線將壓縮的圖象數據發送到上位機，徹底解決了視頻監控中的傳輸「瓶頸」問題。
  10. Popular video dsp systems in today ' s market cannot process data both flexibly and at real time. therefore, this paper proposes a real time video dsp platform design scheme based on fpga and pci bus, and introduces the method to construct high - speed data transmission interface with plx pci9054

    針對當前市場上主流視頻dsp系統在數據處理的靈活性和實時性上不能兼顧的不足，本文提出了基於fpga及pci總線的實時視頻dsp平臺設計方案，並重點介紹利用pci介面晶元pci9054搭建高速數據傳輸介面的具體實現方法。
  11. This stage makes heavy use of the video memory and the video memory bus

    這個過程中對顯存和顯存總線的負擔比較大。
  12. And there is the uncle bus video side by side with nikes ronaldinho video on youtube

    這邊廂： nike朗拿甸奴；那邊廂：香港電車阿叔。
  13. Audio, video and audiovisual systems. domestic digital bus

    音頻視頻和視聽系統.家用數字總線
  14. Audio, video and audiovisual systems ; domestic digital bus

    音頻視頻及視聽系統.家用數字式總線
  15. D2b audio, video and audiovisual systems - domestic digital bus

    音頻視頻及視聽系統家用數字總線
  16. Audio, video and audiovisual systems ; domestic digital bus ; amendment 1

    音頻視頻和視聽系統.家用數字總線.修改件1
  17. We use the tms320dm642 as the core of the whole hardware system, configure abundant function module for system adopting modularization design idea, including emif bus configuration module, audio module, video capture module, video display module and network module

    整個硬體系統以tms320dm642為核心，採用模塊化設計思想，為系統配置了豐富的功能模塊: emif總線配置模塊、音頻模塊、視頻捕獲模塊、視頻顯示模塊以及網路模塊。
  18. Two - bus series console mixers are suited for live perform, band, mini - type hall, meeting - room, school, church, recording, studio, and anaphase video facture and so on

    兩編組系列調音臺，適用於實況演出擴聲，樂隊，小型場地，會議，學校和教堂演播室錄音，小型演播室，前期錄音和視頻後期製作等場合。
  19. Today, the i2c bus is used in many other application fields than just audio and video equipment. the bus is generally accepted in the industry as a de - facto standard

    隨著各種通用型外圍器件的增多，總線在通訊類產品、儀器儀表、工業測控等領域的應用也會逐漸成熟起來。
  20. Dzb specification for domestic digital bus for audio, video and audiovisual systems

    音頻視頻和視聽系統用家用數字總線
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