voltage bias 中文意思是什麼
voltage bias
解釋
偏壓-
Simox soi wafers produced by ion implant processes were used in this experiment. the results for simox soi samples we got here revealed that all the three structures are valuable for soi electrical characterization and sis structure has irrefragable advantage over the other two structures. the soi transistors have been the key devices for achieving the low voltage operation and low power consumption, because of the small junction capacitance, the small s - factor, and the small substrate bias effect
這三種模型分別是：第一，將傳統的mos電容結構應用到soi材料上來進行c - v ， i - v測試，分析計算soi材料的重要電學性能參數；第二種，針對soi材料的特殊結構，為了適應生產線上對無損soi園片進行電學性能測試的要求，應用mosos結構來對soi材料進行電學性能表徵。 -
Bias voltage, which are related to the superlattice structural paraments, the doped densities and the applied bias voltage. we have also investigated the characteristics of superlattice under hydrostatic pressure by simulations
超晶格的負微分電導區還導致出現固定偏壓下隨時間變化的電流自維持振蕩，振蕩產生的條件依賴于其結構參數，摻雜濃度和外加偏壓的大小。 -
The transformer isolates the transistors with regard to d-c bias voltage.
變壓器可在兩個晶體管之間隔離直流偏壓。 -
It is found that the main electronic conduction mechanism in the high field regions of the i - v characteristics is identified to be fowlernordheim tunneling. the effect of y ray on sic mos c - v characteristics depends strongly on the bias voltage applied to the gate electrode during irrad
當氧化層中存在較強電場時，電離輻照對s匯mos電容的影響會更明顯， sicmos器件比st器件具有更好的抗y輻照的能力。 -
Author analyzed the relationship between the length and the impurity concentration of drift region and thickness of buried oxide layer and thickness of soi and the charges of oxide layer and bias voltage of bulk and breakdown voltage and on - resistance by numerical simulation
採用數值模擬分析方法，深入研究了漂移區長度、漂移區濃度、埋氧層厚度、頂層硅厚度、氧化層電荷以及襯底偏壓對resurf效應、擊穿電壓和導通電阻的影響。 -
The effect of electrostatic force of the drive voltage on the accelerometer had been researched when the bias voltage polarity is positive - negative configuration
前人在研究驅動信號對傳感器的靜電力效應時，用偏置電壓極性為正?負配置的驅動信號進行研究。 -
1 successively depositing cbn thin films on si substrates which reaches international advanced level, the impact of negative substrate bias voltage and rf powers on the formation of cbn thin films were studied. boron nitride ( bn ) films were deposited on ( 100 ) - oriented p - type silicon substrate ( 8i sqcm ) with rf sputtering system. the target was hexagonal boron nitride ( hbn ) of 4n purity, and the working gas was the mixture of nitrogen and argon
研究了襯底負偏壓和射頻功率對制備立方氮化硼薄膜的影響立方氮化硼薄膜沉積在p型si （ 100 ） （ 8 15 cm ）襯底上，靶材為h - bn靶（純度達99 . 99 ） ，濺射氣體為氬氣和氮氣混合而成，制樣過程中，襯底加直流負偏壓。 -
The bias magnetic field of the bias coil driven by bias current and small signal test current, results in the induced signal of the control coil. the terminal voltage of the control coil is detected by the test circuit. then the signal containing the information of rotor displacement is obtained, from which we can get the dc voltage signal proportional to the rotor displacement through half - wave rectification circuit and low pass circuit. this dc signal is put into a pid controller to get the control signal of the rotor displacement
偏置測試電路向偏置線圈輸入偏置電流和小信號測試電流，兩者產生的偏置磁場在控制線圈產生感應信號，檢測電路檢測控制線圈端電壓並提取含有轉子位移信息的電壓信號，該信號經半波整流電路和低通濾波電路后得到與轉子位移成正比例的直流信號，再由pid控制器轉換為轉子位移的控制信號，最後控制信號輸入功放電路產生控制電流，實現閉環控制。 -
Ppfc working principle, circular current and effects of clamping capacitor are studied in this paper in detail. because of the clamping capacitor, ppfc have some good features compared with ppc : reducing the fluctuate of the input current ; restraining the voltage spike of the power mosfet ; avoiding the bias - magnetic of the transformer
由於箝位電容的加入，相對于推挽電路而言，該拓撲具備了一些獨特的優點：減小了輸入電流的脈動：削弱了開關管的關斷電壓尖峰；有效抑制了變壓器的偏磁。 -
The thesis analyses the problems on the noise of apd photoelectric receiving system. author designs apd laser signal receiving system circuits, front amplify circuit, controlling time - series logic circuits, dc / dc transform circuits. and takes apd bias voltage fuzzy control
分析了apd光電接收系統的噪聲問題，並對apd激光信號接收系統電路、前置放大電路、控制時序邏輯電路、 dc / dc變換電路進行了設計，採取了apd偏壓模糊控制。 -
Base on two - stage approach, we adjust experimental parameter to develop a new method ( three - stage approach ) to prepare c - bn thin films. the study proves that it is favorable to prepare bn thin films of high cubic phase content. depositing time and substrate bias voltage in the first stage are 5 min and - 180v respectively
根據si片上bn薄膜的反射光譜r （ ）和熔融石英片上bn薄膜的反射光譜r （ ）和透射光譜t （ ）各自獨立的計算了bn薄膜的光學帶隙，利用兩種方法分別計算立方相含量均約為55 %的bn薄膜的禁帶寬度為5 . 38ev和5 . 4ev ，其結果均和由經驗公式計算得到的結果非常接近。 -
Secondly, the radiation effects of the system of silicon gate si / sio2 ( silicon gate nmos and pmos ) implanted bf2 are made a deep systematic study. especially, the relationship between threshold voltage shift ( vth and vit vot ) in radiated mos transistor and irradiation dose rate, irradiation dose, irradiation temperature, bias voltage, device structure as well as annealing condition is explored emphatically
在此基礎上，對bf _ 2 ~ +注入硅柵si sio _ 2系統低劑量率輻照效應進行了深入系統的研究，著重研究了bf _ 2 ~ -注入mos管閾值電壓漂移（ vth和vit 、 vot ）與輻照劑量率、輻照總劑量、輻照溫度、偏置電場、器件結構以及退火條件的依賴關系。 -
Process parameters included rf power, substrate negative bias voltage, substrate temperature and working gas pressure
工藝參數有射頻功率、襯底負偏壓、襯底溫度和工作氣壓等。 -
At 200v of substrate negative bias voltage and 300w of rf power, the content of cubic phase in bn films reaches 92. 8 %
當負偏壓為200v ，功率為300w時，薄膜中立方相的含量達到92 . 8 。 -
For obtaining cbn thin films, it is necessary that substrate negative bias voltage is not lower than 90v and r. f power is not lower than 200w
若要得到立方氮化硼薄膜，負偏壓不能低於90v ，功率不能低於200w 。 -
Substrate negative bias voltage deeply impacts the nucleation and growth of cbn. there is a threshold value of bias voltage for depositing cbn
襯底負偏壓對立方氮化硼的成核和生長有十分重要的影響，存在偏壓閾值，低於該值不能產生立方氮化硼。 -
The enhancement of water wettability, better optical transparency, and higher wear resistance have been found after the samples were treated under high rf power, bias voltage and gas pressure conditions
在較高射頻功率、基板負偏壓、反應氣體壓強狀態下制備膜層的潤濕性、耐磨損性較好，而光學透過率較低。 -
On the one hand, the design uses low voltage cascode op framework to improve its gain ; on the other hand, it applies self - bias and cascode structure to the whole sensing circuit. by using the improved method, we have successfully obtained low power consumption, low offset, high linear and high psrr ptat current generator under low power supply
在電路設計上一方面改進運放結構，採用低壓共源共柵結構以提高其增益，另一方面整體傳感電路採用自偏置結構和共源共柵電流鏡結構，在低電源電壓下成功設計了低功耗、低失調、高線性度和高電源電壓抑制比的ptat電流產生電路。 -
An hfo2 layer with less than 3. 5nm eot was obtained and show good electrical properties. the gate leakage current at a gate voltage bias of iv is less than 10 - 7 a / cm2
研究顯示，濺射氛圍中增加氧分壓和在氧氣氛退火有助於減小hfo _ 2柵介質的漏電流。 -
Applying the opposite voltage bias to widen the tunneling gap and raise the electrical resistance would reopen the switch
施加反向電壓以增大穿隧間隙，提高電阻，可以重新將開關斷開。
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