幀同步字 的英文怎麼說
中文拼音 [zhèngtóngbùzì]
幀同步字
英文
fsp-
The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing
本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據幀存模塊、基準時鐘產生模塊、 d a編碼模塊、 i ~ 2c總線控制模塊等部分軟、硬體設計及調試。其中a d解碼模塊採集模擬電視信號實現視頻解碼; fpga視頻處理模塊對解碼后的數據進行去噪處理的同時還負責系統的邏輯控制;視頻數據幀存模塊為大量高速的視頻數據提供緩沖區;基準時鐘產生模塊通過輸入基準視頻信號為系統提供精確的相關同步信號; d a編碼模塊在視頻處理模塊的控制下把數字視頻數據轉換成復合電視信號供顯示用: i ~ 2c總線控制模塊模擬i ~ 2c總線時序實現對系統中編、解碼晶元的初始化。It first introduces the mpeg - 2 standard and the grammar structure of the ts. then it describes the principle of synchronization and multiplexing in digital communication. the synchronization comprises the carrier synchronization, bit synchronization, group synchronization and network synchronization while the multiplexing includes bit multiplexing, word multiplexing and frame multiplexing
本文首先介紹了mpeg _ 2標準及其mpeg _ 2傳輸流語法結構,接著闡述了數字通信中的同步和復接理論,同步包括載波同步、位同步、群同步和網同步,復接包括按位復接、按字復接、按幀復接。Fpga design and implement of frame synchronous scheme in digital multiplexer system
的數字復接系統幀同步器設計與實現The input data of the multiplexing adopts 8 channels with the speed of 2mb / s, and those of the last two channels are " 0 " and " 1 " respectively, in order to improve the transimision effeciency and deminish the complexity of encode and electronic circuit concerned, furthermore, it makes the synchronous signal acquisition more easier
數字復接中採用八路2m口數據輸入,其中后兩路採用直接輸入「 0 」碼或「 1 」碼的方法,提高了信息傳輸的有效性,便於提取幀同步碼,降低了編譯碼過程的復雜性,同時也降低了系統的電路復雜程度。Frame structure for synchronous digital hierarchy signal
同步數字體系信號的幀結構A set of consecutive digit time slots in which the position of each digit time slot can be identified by reference to a frame alignment signal
一組連續的數字時間片段,每一數字時間片段在組內的位置可參考幀同步信號來標識。The design combines the advantages of hardware " s high - speed and software ' s low resources : 1 ) mc145572 is chosen to access the net providing 128kbit / s, 2b + d full dual channels ; 2 ) because of b channel " s large amount of user data and its high demands of real - time performance, the gsc hardware channel of intel 80c152 used as cup of the system is used to wrap / unwrap b channel " s sdlc, ensuring the system real - time working
第一,選用motorola的mc145572晶元來實現終端在u節點的n ? isdn的物理接入。提供2b + d通道的全雙工的數字通信,速率達128kbps 。第二, b通道承載數據量大,實時性要求高,採用intel80c152作為cpu ,利用其gsc硬體通道實現b通道數據的sdlc (同步數據鏈路)裝幀與解幀,以確保通信的實時性。Digital video watermarking is a powerful tool for video copyright protection and security authentication. video data is redundancy, so video watermark usually encounters synchronization attacks, such as frame dropping, cut - paste etc, how to improve synchronization attack - resistance of video watermarking has become an important research trend
數字視頻水印是版權保護和安全認證的有力工具,而視頻的高冗餘性特徵使得視頻水印極易受到幀切除、剪切-復制等同步攻擊,如何提高視頻水印的同步魯棒性成為數字視頻水印的重要研究內容。Mke - 810 encoder is able to provide high - quality video, audio compression with mpeg - 2 encoder. it provides efficient rate and cache control can be both high and low bit - rate high - definition quality. it mp ml with mpeg - 2 video coding standard resolution of 720 576 25. 2m - 20m programs for each output bit rate adjustable. meanwhile a variety of interface and high performance core of the larger independent mpeg - 2 module integrated within the box. meet efficient installation
採用4 : 2 : 2數字視頻和20位數字音頻編解碼技術內置時基校正和幀同步功能,保證信號的傳輸質量單模傳輸方式,波長為1310nm或1550nm ,傳輸距離可達100公里E1a european framing specification for synchronous digital streams. the total transmission rate is 2. 048mbit s
同步數字流的歐洲幀結構規范It becomes more difficult to realize frame synchronization with higher data transfer speed, and this field applies mostly high - speed digital circuits technique
隨著數據傳輸速率增高,其幀同步的實現就越來越困難,而該領域主要是應用高速數字電路技術。分享友人