幀同步碼 的英文怎麼說

中文拼音 [zhèngtóng]
幀同步碼 英文
frame synchronization code
  • : 量詞(幅, 用於字畫)
  • : Ⅰ名詞1 (步度; 腳步) pace; step 2 (階段) stage; step 3 (地步; 境地) condition; situation; st...
  • : Ⅰ名詞(表示數目的符號或用具) a sign or object indicating number; code Ⅱ量詞1 (指一件事或一類的...
  1. The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing

    本課題主要完成了a d解模塊、 fpga視頻處理模塊、視頻數據存模塊、基準時鐘產生模塊、 d a編模塊、 i ~ 2c總線控制模塊等部分軟、硬體設計及調試。其中a d解模塊採集模擬電視信號實現視頻解; fpga視頻處理模塊對解后的數據進行去噪處理的時還負責系統的邏輯控制;視頻數據存模塊為大量高速的視頻數據提供緩沖區;基準時鐘產生模塊通過輸入基準視頻信號為系統提供精確的相關信號; d a編模塊在視頻處理模塊的控制下把數字視頻數據轉換成復合電視信號供顯示用: i ~ 2c總線控制模塊模擬i ~ 2c總線時序實現對系統中編、解晶元的初始化。
  2. Based on the dsp development board, the author finishes the hardware debug about the multi - channel buffered serial port ( mcbsp ) receiving the output signal from the gps if collector and resolves the software program of the receiving buffer of the multi - channel synchronous serial data, data integration, udp datagram encapsulation and network interface driver, etc. the real - time udp datagram receiving, data frame de - encapsulation and high speed data memory are implemented, and a friend application interface with windows message is developed on the pc

    基於dsp開發板,作者完成了dsp的多通道緩沖串口( mcbsp )接收gps中頻接收機輸出信號的硬體調試,並解決了多通道串口數據的接收緩沖、數據合併、 udp數據報裝及網路介面驅動等軟體編程。在pc端,通過mfc的網路應用開發類casyncsocket實現udp報的實時接收、數據解、高速存貯,利用windows消息機制開發了應用程序友好界面。
  3. The performances of high - speed sdh frame aligner and selection of frame pattern

    系統性能與組選擇
  4. Frame synchronization, acquisition and tracking of cc - codes are simulated. continual special code insertion method is used in the simulation of frame synchronization

    分別對、完全互補的捕獲、擴頻序列的跟蹤進行了模擬研究。
  5. The performance of new cdma system under simple multipath, rician and rayleigh fading channels is evaluated using simulation. fourth, synchronization methods of cdma system are discussed

    此外,論文還研究了cdma系統的方法,模擬實現了完全互補的捕獲和跟蹤,系統的載波
  6. The circuit of assembling frame and splitting frame based on ram and fifo are designed ( realized frame synchronization ). the two 3b4b converting circuits are designed ( realized one circuit ). the nrz, rz, manchester code converting circuits are designed

    4 、設計了基於fifo和ram的兩種組和拆電路(實現了幀同步碼檢出) ;設計了兩種3b4b編譯電路(實現了一種) ,針對nrzi 、 rz和曼各設計了一個編譯電路。
  7. The goal of this thesis is to accomplish base - band channel coding / decoding, fh framing / de - framing and fh synchronization, and also to control the modulator and demodulator in the prototype system. all these functions are implemented with a tms320vc5409 dsp

    作為項目的一個重要組成部分,本文採用dsptms320vc5409實現了基帶處理部分的通道編解、跳頻意義的組拆和跳頻、並對調制解調晶元讀寫寄存器進行了配置。
  8. Simulation has shown that the proposed scheme can achieve more accurately in similarity examination than scheme which proposed by [ 102 ]. so the bit number of coded video stream was decreased about 22. 95 percent and thus the compression ratio was improved. although the coding cost was increased about 8. 25 percent by using proposed scheme

    模擬實驗表明,與文獻[ 102 ]方案相比,提出的方案雖然增加了約8 . 25的編器編耗時,卻有效提高了對視頻序列突變的檢測精度,從而進一降低編器端輸出編視頻流的比特數達22 . 95左右,在基本不影響重構視頻信息視覺質量的時提高了編器的壓縮效率。
  9. The input data of the multiplexing adopts 8 channels with the speed of 2mb / s, and those of the last two channels are " 0 " and " 1 " respectively, in order to improve the transimision effeciency and deminish the complexity of encode and electronic circuit concerned, furthermore, it makes the synchronous signal acquisition more easier

    數字復接中採用八路2m口數據輸入,其中后兩路採用直接輸入「 0 」或「 1 」的方法,提高了信息傳輸的有效性,便於提取幀同步碼,降低了編譯過程的復雜性,時也降低了系統的電路復雜程度。
  10. Recurring to resynchronization marker, data partitioning and rvlc, video files with errors are dealt with. the article codes and decodes video source files with errors, computing every algorithm ' s psnr, comparing video pictures " subjective and objective quality

    運用重標志( resyncmarker ) 、數據分離( datapartitioning )和可逆變長編( rvlc )對含錯的視頻文件分別做錯誤處理。以mpeg - 4錯誤恢復方法對糟糕視頻源文件編、解,計算該演算法的psnr ,比較視頻的主客觀質量。
  11. In the part of platform designing, proper peripheral chips are chosen according to the audio signal format. and how to achieve channel synchronization in the receiving part is an important aspect of wireless transmission system. in order to solve this problem, three algorithms are used ; those are scramble / descramble, improved over - sampling, and frame synchronization protocol

    在硬體驗證平臺的設計部分,文章根據音頻信號的特點選擇了適當的外圍晶元,並且針對無線傳輸接收端的問題,採用了三種演算法來減少失現象,即擾/解擾演算法,改進型的過采樣演算法,以及協議。
  12. In this thesis, the principle of polarized light wave transmit in optical fiber is researched, i. e. principle of ternary optical fiber communication is researched. based on the researches, the construction of ternary codes optical end machine and 3b2t optical end machine used in two - state fiber net are designed. the construction and component of circuits in 3b2t optical ( called sign converter circuit - scc ) are designed particularly, including : the clock synchronization module, the data synchronizing, code converting module, frame managing module and error exam and managing module

    本文研究了線偏光波動理論以及在光纖中的傳輸原理,研究了三值光通信系統原理和器件原理;在此基礎上,設計了三值光端機和在現有兩值光纖網中實現三值光通信的3b2t三值光端機的組成結構,詳細設計了3b2t三值光端機的電路組成部分(稱為電信號變換電路scc ) ,包括:時鐘模塊、數據模塊、元變換模塊、處理模塊及差錯檢測和處理模塊;而且在三值光纖通信基礎上,提出了四值光通信的原理和偏分復用的實用化方法。
  13. High - speed frame - synchronizer is an absolutely necessarily key device of the remote sensing satellite ' s ground - receiving system. it is mainly used to format the high - speed data stream, so that computer can get the beginning address of every frame of the high - speed data stream, and then data stream would be send to computer for pretreatment through high - speed interface

    高速格式化器是遙感衛星地面接收系統中必不可少的關鍵設備之一,主要將從衛星接收到的高速數流格式化,使計算機得以辨識每一的起始位置,然後將數流經高速介面進入計算機進行預處理。
  14. In this paper, the method of in - bore abnormal phenomenon remote detecting is presented. considering of the multi - channel transient signals automatic acquisition, a project of pcm signal hardwire transmission data automatic acquire system is put forward. in this system, a pcm demodulate board is designed, it can decode the pcm code string which contain the information of the multi - channel transient signals, it also can catch the useful data automatically, and transmit these data to upper pc by rs485

    在該系統中,為了能夠解調出包含多路動態信號數據的高速率pcm信號,設計並製作了一種適用的pcm解調板,能夠從pcm流中恢復出位時鐘信號,從而與發送端保持位,從而對pcm流可靠地解調、緩存,並能根據計算機設定的觸發條件自動地捕獲多路信號的有效段,然後利用rs485總線將這些數據可靠地遠傳至計算機以供顯示、分析和保存。
  15. Mke - 810 encoder is able to provide high - quality video, audio compression with mpeg - 2 encoder. it provides efficient rate and cache control can be both high and low bit - rate high - definition quality. it mp ml with mpeg - 2 video coding standard resolution of 720 576 25. 2m - 20m programs for each output bit rate adjustable. meanwhile a variety of interface and high performance core of the larger independent mpeg - 2 module integrated within the box. meet efficient installation

    採用4 : 2 : 2數字視頻和20位數字音頻編解技術內置時基校正和功能,保證信號的傳輸質量單模傳輸方式,波長為1310nm或1550nm ,傳輸距離可達100公里
  16. Frame synchronization code

    幀同步碼
  17. The frame synchronization is researched. different from usual frame synchronization, one method, without synchronization code being known, is realized through programming. this method is to find synchronization code first and then to begin frame synchronization

    進一研究了問題,區別于普通的已知幀同步碼過程,設計了一種在不知道幀同步碼的情況下搜索幀同步碼,然後再進行的方案,並用軟體實現。
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