幀編號 的英文怎麼說

中文拼音 [zhèngbiānháo]
幀編號 英文
fn frame number
  • : 量詞(幅, 用於字畫)
  • : Ⅰ動詞1 (編織) weave; plait; braid 2 (組織; 排列) make a list; arrange in a list; organize; gr...
  • : 號Ⅰ名1 (名稱) name 2 (別號; 字) assumed name; alternative name3 (商店) business house 4 (...
  • 編號 : 1 (按順序編號數) number 2 (編定的號數) identifier; serial number; 編號次序 numeral order; 編...
  1. The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing

    本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據存模塊、基準時鐘產生模塊、 d a碼模塊、 i ~ 2c總線控制模塊等部分軟、硬體設計及調試。其中a d解碼模塊採集模擬電視信實現視頻解碼; fpga視頻處理模塊對解碼后的數據進行去噪處理的同時還負責系統的邏輯控制;視頻數據存模塊為大量高速的視頻數據提供緩沖區;基準時鐘產生模塊通過輸入基準視頻信為系統提供精確的相關同步信; d a碼模塊在視頻處理模塊的控制下把數字視頻數據轉換成復合電視信供顯示用: i ~ 2c總線控制模塊模擬i ~ 2c總線時序實現對系統中、解碼晶元的初始化。
  2. After about two years " insisting and hard working, this goal set at the beginning has become true. the developed c54x general assembly program for g. 729 speech signal compressing algorithm has passed the tracking with more than 3, 000 unitary standard measuring vectors. g. 729 speech signal compressing compiler using c54x general assembly program has been accomplished real - timely, and undistorted rebuilt speech signals have been obtained

    因此本課題選用c54x的通用匯語言程實現g . 729語音壓縮碼演算法,調試並通過了統一標準測試矢量三千多,最終在5402開發實驗板上實時實現了g . 729語音壓縮碼器,獲得未失真的重建語音信
  3. Based on the dsp development board, the author finishes the hardware debug about the multi - channel buffered serial port ( mcbsp ) receiving the output signal from the gps if collector and resolves the software program of the receiving buffer of the multi - channel synchronous serial data, data integration, udp datagram encapsulation and network interface driver, etc. the real - time udp datagram receiving, data frame de - encapsulation and high speed data memory are implemented, and a friend application interface with windows message is developed on the pc

    基於dsp開發板,作者完成了dsp的多通道緩沖串口( mcbsp )接收gps中頻接收機輸出信的硬體調試,並解決了多通道同步串口數據的接收緩沖、數據合併、 udp數據報裝及網路介面驅動等軟體程。在pc端,通過mfc的網路應用開發類casyncsocket實現udp報的實時接收、數據解譯碼、高速存貯,利用windows消息機制開發了應用程序友好界面。
  4. Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper, carried on intact summing up to the data in the system, having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram, give solution that many pieces of sdram works togetherses of realizing heavy capacity, designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus, optimize back end state machine design and urge procedure making with lower, giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices, due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal, method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo

    本文首先對數字減影血管造影( dsa )成像系統的組成結構和數據流向進行了深入研究和分析,並對系統中的數據流向進行了完整的歸納和總結,給出了x線數字成像系統中的高速大容量數據通道的設計方案;在對sdram的控制方式做了深入探討后,給出了實現大容量多條sdram共同工作的解決方案,在此基礎上設計了大容量存板實現對圖象數據進行高速存儲;通過對pci總線介面的深入研究,優化後端狀態機設計和低層驅動程序開發,給出了完整的pci介面方案實現高速dma數據傳輸,完全可以滿足視頻傳輸要求;深入研究了基於大規模可程器件的數字系統設計方法,針對通用fifo使能信漂移、輸出數據難于建立和保持等設計難點,提出了利用fpga中的鎖相環提供多個時鐘相移的信來提高系統穩定性的解決方案,從而實現利用fifo來協調系統各模塊之間的數據高速傳輸。
  5. The system is consist of the main data processing board which is based onthe fpga device and fast ethernet phyceiver rtl8201l and a - law pcm data encoder and decorder chip msm7702 - 3, and the dial - up and display board which is based on mcu. the main board would carry out the core task of data processing, such as voice data packing and unpacking, the ethernet frame processing, protocol processing, call processing, etc. the dial - up and display board would carry out the task of display the ip address which is input by consumer and status of network during talk period from the main board, and so on. in the paper the system of lan ip telephone and the tcp / ip protocol is introduced firstly, then the fpga device is stated. after that the fpga - based hardware scheme is introduced in detail in chapter four

    系統以altera公司的acex1k系列的fpga和快速以太網控制器rtl8201l和語音解碼晶元msm7702 - 3為核心構建了數據處理主板和以單片機為控制器的撥顯示子板組成。數據處理主板的核心任務,包括語音數據處理、以太網處理、協議處理、呼叫處理等。撥顯示子板則完成通話前的顯示用戶所撥過的ip地址,通話期間網路狀態的顯示等等。
  6. We select fpga of type xc3s200 as hardware to design the coder and display the hardware resources inside, moreover study the method and steps of designing dsp, based on fpga, by using system generator, finally, it emphasizes the design process of multi - band excitation vocoder. we can work out the module of high pass filter and the module of low pass filter, module of divide frame, module of keynote rough estimate, module of keynote fine estimate, module of band - separated v / u judgment / verdict and module of band - separated amplitude estimate, by using simulink, ise and system generator

    本文選用型為xc3s200的fpga作為設計碼器的核心硬體,介紹了其內部所含的硬體資源,並研究了利用systemgenerator基於fpga設計dsp的方法和步驟,最後,本文把重點放在多帶激勵語音碼器的設計上,利用simulink , ise和systemgenerator分別設計其中的高通低通濾波器模塊、分疊加模塊、基音粗估模塊、基音精細估計模塊、分帶v / u判決模塊、分帶幅度估計模塊。
  7. Most of these standards are based on the method of inter - frame motion compensation and two - dimensional discrete cosine transform ( 2d - dct ) and encode and describe the color video in ycbcr 4 : 2 : 0 format, which want to take advantage of human visual system ( hvs ) to save bit expense by decreasing the resolution of two color difference components

    當前國際上的壓縮標準普遍採用間運動補償加內二維離散餘弦變換的碼方法,並且將彩色視頻序列表示為ycbcr格式,試圖利用人眼的視覺特性降低對色差信的解析度來節省比特開銷。
  8. Abstract : some problems about overall design of a small unmanned air vehicle telemetry system are presented in this paper. the construction and fundamental principle of the telemetry system is simply introduced. according to the telemetry task requirement, the key problems which should be solved at first are demonstrated mainly by system " s capacity design and channel design. the needed data transmission rate is carefully calculated with the telemetry parameter table provided by user and on this basis the frame structure is decided. the bit error rate in factual telemetry channel is grossly estimated in theory and a channel encoding scheme is provided to improve data transmission quality to meet with the requirement for extremely low bit error rate

    文摘:論述了某型無人機遙測系統中的容量和通道設計問題.文中對該遙測系統的組成和原理進行了介紹.結合具體的遙測任務需求,在容量設計中確定了數據傳輸率和使用的格式,在通道設計中,通過計算實際通道中的誤碼率,提出了相應的通道碼方案以確保數據傳輸的低誤碼率要求
  9. Mke - 810 encoder is able to provide high - quality video, audio compression with mpeg - 2 encoder. it provides efficient rate and cache control can be both high and low bit - rate high - definition quality. it mp ml with mpeg - 2 video coding standard resolution of 720 576 25. 2m - 20m programs for each output bit rate adjustable. meanwhile a variety of interface and high performance core of the larger independent mpeg - 2 module integrated within the box. meet efficient installation

    採用4 : 2 : 2數字視頻和20位數字音頻解碼技術內置時基校正和同步功能,保證信的傳輸質量單模傳輸方式,波長為1310nm或1550nm ,傳輸距離可達100公里
  10. So, in this paper, the theory and algorithm of vr are being developed. in this paper, several key problems in vr process are being discussed both in theory and application, which include pre - processing, frame decomposing of raw voice signal, characteristic selection and calculation, dynamic mapping of characteristics. linear prediction model, model coefficients ( lpc ), as well as cepstrum coefficients are well analyzed both in analysis and calculation aspects

    作者在本論文中,對國內外語音識別技術發展狀況做了較全面的總結分析,對語音信產生模型、線性預測碼方法、求解lpc正則方程的德賓遞推演算法、語音信同態處理方法、 lpc倒譜特徵計算、動態特徵匹配等語音識別的關鍵環節的技術問題進行了深入的理論分析和模擬研究,用matlab語言寫了語音信濾波、分、特徵計算和匹配軟體,並給出了模擬計算結果。
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