指令周期數 的英文怎麼說
中文拼音 [zhǐlìngzhōuqīshǔ]
指令周期數
英文
instruction cycles-
As a result of studying, we gain three system time capability parameter of monolayer bus framework and two - double bus framework, data bus utilization, length of the data waiting queue and time of system timed, basing on fixed bc control seasonal repertoire timed petri net and stochastic petri net
研究結果分別得出了單總線和雙總線的基於固定主控端周期指令時延petri網的數據總線利用率、等候消息隊長、系統延時時間；基於隨機petri網的數據總線利用率、等候消息隊長、系統延時時間共三個系統時間性能指標。The core is based on harvard architecture with 16 - bit instruction length and 8 - bit data length. the performance of mcu has been improved greatly by introducing single - clock - cycle instructions, setting multiple high - speed working registers and replacing micro - program with direct logic block etc. to keep the mcu core reusable and transplantable, the whole mcu core has been coded for synthesis in verilog hdl
該mcu核採用哈佛結構、 16位指令字長和8位數據字長，通過設計單周期指令、在內部設置多個快速寄存器及採用硬布線邏輯代替微程序控制的方法，加快了微處理器的速度，提高了指令的執行效率。At the base of compiler forepart, considering repertoire, addressing mode and instruction period of object machine, adopting backfill to fill data for machine code in order to generate right object code, assemble language program
在編譯前端的基礎上，考慮目標機的指令系統、尋址方式和指令周期，採用回填技術對機器碼填充數據以生成等價有效的目標代碼? ?匯編語言程序。It aims at reducing the number of execution cycles of instructions, and has experienced from the period of single issue architecture to the period of multiple issue architecture. in the past twenty years, risc has become more and more mature abroad. it makes great sense to develop our own risc and it is a effective way to develop our own risc with the instruction set which is compatible with those of risc which has been widely used
80年代初出現的risc技術是計算機體系結構的重大變革，它以減少指令執行的平均周期數為結構設計的主要目標，經歷了從單發射結構到多發射結構的演變過程，解決了深度流水技術、相關技術、轉移預測技術、編譯優化技術等一系列技術難點，在20多年的時間里， risc技術的發展已日趨成熟與完善微處理器在軍事和民用領域都有著廣泛的應用，研製具有我國自主獨立版權的微處理器在當今具有重大意義。Moreover, ck510 employs some low - power design techniques with performance improved. there are three instructions controlling power consumption on system - level and gated clock technique is widely used in ck510. integer computing ability is very important for embedded cpu
在嵌入式處理器中，整數單元一般進行指令譯碼、指令發射和指令執行，是處理器中的一個重要部件，它直接影響著處理器的性能（ cpi ，每條指令花費的時鐘周期）和功耗指標。A design method based on the decomposition and multiplexing technique of complex instruction, combined the decoding arithmetic of instruction and a step counter together, sub - step realization method of multiclocks is proposed. the similarities and differences of architecture between fsm and multi - ? ocks are discussed from two aspects, timing and state space
提出了執行周期復用的指令分解、指令寄存器與步長計數器聯合譯碼，以及多時鐘同步的控制流設計方法；進而從時間和狀態空間兩個角度深入討論了控制流設計中狀態機和多時鐘兩種常見體系結構的異同。Dsp owns rapid instruction periods, address buses separated from data buses, which can excellently adapt to the rapid digital signal process
Dsp擁有快速的指令周期以及地址、數據總線分離等適合快速數字信號處理的優點。分享友人