接收器電路 的英文怎麼說

中文拼音 [jiēshōudiàn]
接收器電路 英文
acceptor circuit
  • : Ⅰ動詞1 (靠近;接觸) come into contact with; come close to 2 (連接; 使連接) connect; join; put ...
  • : Ⅰ動詞1 (把攤開的或分散的事物聚集、合攏) put away; take in 2 (收取) collect 3 (收割) harvest...
  • : 名詞1. (器具) implement; utensil; ware 2. (器官) organ 3. (度量; 才能) capacity; talent 4. (姓氏) a surname
  • : Ⅰ名詞1 (有電荷存在和電荷變化的現象) electricity 2 (電報) telegram; cable Ⅱ動詞1 (觸電) give...
  • : 1 (道路) road; way; path 2 (路程) journey; distance 3 (途徑; 門路) way; means 4 (條理) se...
  • 接收器 : acceptor
  • 接收 : 1 (收受) receive; reception; accept; [電學] receipt; receiving 2 (接管) take over; expropriat...
  • 電路 : [訊] circuit (ckt); electric circuit; electrocircuit電路板 circuit board; 電路保持 guard of a c...
  1. The main products include series of adaptor and connector for electronic communication, catv amplifier housing, optical transmitter, optical workstation, optical receriver housing and accessory, housing for outdoor cupler and splitter, connector and adaptor for the network, etc

    主要產品有:插件、連、 catv放大外殼、光發射機、光工作站、光外殼及有關配件;野外型分支、分配外殼、室內型分支、分配外殼、網用連插件等。
  2. The cosmic ray telescope contains 3 detectors, a trigger electronics, a gps receiver and a timer card in a computer

    宇宙射線望遠鏡主要是由三件探測、一組觸發、一個全球定位系統和一部配備計時介面的腦組成。
  3. And i finished the layout design, chip test of line driver and equalizer in 2. 5gbps baseband copper cable transceiver and equalizer in the 1. 5gbps sata transceiver respectively. the main improvements and innovations in this thesis are as follows : 1 、 to design an analog equalizer tuned on - chip for 2. 5gbps baseband copper cable transceiver ; 2 、 to present an adaptive equalizer for 1000base - cx transceiver ; 3 、 to present an auto - gain control amplifier used in the adaptive equalizer for the 1000base - cx transceiver ; 4 、 to present an adaptive continuous - time gm - c filter in very high frequency for the adaptive equalizer for the 1000base - cx transceiver

    論文主要的改進和創新有: 1 、設計了適用於2 . 5gbps基帶銅纜系統片上可調的模擬均衡; 2 、提出了一種新的適用於千兆以太網基帶銅纜系統的自適應均衡結構; 3 、設計了甚高頻自動增益控制放大; 4 、設計了一種適用於千兆以太網基帶銅纜均衡的自適應甚高頻連續時間gm - c二階帶通濾波
  4. One forward optical receiver module takes one slot, after power double - amplification inside, send out 1 way rf signal 104dbuv and 1 way level checking signal, or two - distribution output

    一個正向光模塊佔一個槽位,內置功率倍增放大,輸出1射頻信號104dbuv和1平檢測口,或二分配輸出
  5. 25hz phase detecting track circuit microelectronic receiver

    25hz相敏軌道
  6. Harmonized system of quality assessment for electronic components. integrated line transmitters and or receivers. blank detail specification

    子元件統一質量評審體系.集成發射和或.空白詳細規范
  7. A novel receiver in high - speed serial data interface usb 2

    一種新型的用於高速串列介面中的
  8. All the amplifier circuits are screwed on the heat sink, shielded in order to reduce rf emissions and supplied with a + 32v voltage regulator

    所有的放大是被擰在熱量上的,為了減小射頻熱散發,所有的放大是被遮蔽的,並由一個+ 32v壓的調整來供應。
  9. Computer ethernet cards, routers, switch, and networking peripherals

    腦網卡集線
  10. Particular attention has been paid to the design of the cooling circuit, by carefully choosing the solution “ fans - heat sink ” capable of ensuring the best cooling of the equipment and therefore a high degree of reliability

    細節的注意點已被考慮在冷的設計中,通過仔細地選擇「扇-熱」的解決辦法,確保最好的設備冷卻和由此而得到一個高程度的可靠性是可以的。
  11. A balanced differential line receiver senses the voltage state of the transmission line across two signal input lines, a and b

    譯為: 「平衡差分線感測的是通過兩個信號輸入線a和b的傳輸線上的壓狀態」 ?
  12. 4. according to the analyses of underwater acoustic channel and long - range remote control receiving system, we designed the long - range remote control receiver, including a low noise prefix - amplifier, a band pass filter and an auto - gain control circuit. finally, the analog part of the receiver is tested and the frequency response of this receiving system is obtained.

    結合對水聲通道特性和遠程遙控系統的分析,進行了遠程遙控機的設計,包括機低噪聲前置放大的設計、帶通濾波的設計和集成以及自動增益控制的設計,最後對機模擬進行了調試。
  13. This paper research the principle of two dimensional collimator system in which the area - array ccd, cpld circuit and dsp chip are used. digital acquisition and processing hardware and software were designed. the test result was given

    本文研究了用cmos作為件,用cpld和dsp晶元進行系統流程式控制制和數據處理的二維變形測角儀的系統原理,設計了數據採集、處理的硬體軟體,並進行了實驗。
  14. Doc circuitry is designed to drive cmos input devices, which are capacitive in nature, in point - to - point applications ( one receiver input per driver output )

    在點對點應用中(每驅動輸出對一個輸入) ,設計doc驅動原本為容性的cmos輸入的件。
  15. In this topic, an adc circuit and data - storage system for all digital ultra - wideband receiver was designed, and the ultra - wideband narrow pulse signal that is received is digitalized, using an ultra - high - speed a / d convertor

    本課題設計了一個全數字化超寬帶的adc及數據存儲系統。利用一個超高速的ad轉換,對超寬帶窄脈沖信號進行數字化。
  16. That is why high - speed networks require special cables, active hubs, agile transceivers and skilled installers

    正因為如此,高速網才需要特製的纜、主動式集線、靈敏的與熟練的安裝人員。
  17. Chapter one introduces the recent development of usb2. 0 and the overall architecture of transceiver interface ; chapter two proposes the design flow and design style ; chapter three presents the whole system and module partition ; chapter four emphasizes on the dual - mode transmitter circuit, and gives out the simulation waveforms ; chapter five focuses on the design of over - sampling receiver and dll ( delay locked loop ) module ; chapter six designs the band - gap reference circuit. in the end, it concludes the design, and estimates the trend of usb. the dissertation is emphasized on dual - mode transmitter architecture, implementation of high speed dll using dba ( digital - based analog ) technology and a new design methodology for complex digital modules in mixed - signal circuit

    本文第一章介紹了usb2 . 0的發展現狀和介面晶元系統;第二章介紹了該晶元的設計流程和風格;第三章介紹了該介面晶元的總體構架以及模塊劃分;第四章著重介紹雙模發送設計並給出了模擬驗證波形;下來第五章分析了過采樣的設計並對其中的dll ( delaylockedloop )模塊設計進行了詳細的分析;第六章介紹了本晶元內置的基準壓源的設計;最後對本文的設計一個總的回顧和總結,並展望下一代usb的發展方向。
  18. The clock and data pulsation signals from upper sensor heads can be received using pin diode, then, amplified and inverted in logical control unit for the purpose of cpu operation. hereinafter, the digital signal will be delivered into the central processing unit ( cpu ) for related calculation, and meanwhile transmitted to a d / a converter for signal recovery after filter and phase - shift circuit

    通過採用pin管從傳感頭傳遞下來的時鐘脈沖和數據脈沖信號,並將它們放大整形傳送到邏輯控制單元,產生邏輯控制信號,再將數字信號傳送給d / a轉換,設計了濾波和移相,還原出了原始的被采樣信號。
  19. A clamp is used in some data sets to hold receiver output constant and avoid troublesome noise interference when no data signals are being received

    鉗位用於某些數據設備可使輸出為常量,並且可在沒有到數據信號時避免噪音干擾。
  20. Specification for harmonized system of quality assessment for electronic components - blank detail specification : integrated line transmitters and receivers

    子元件用質量評估協調體系規范.空白詳細規范:集成線發送
分享友人