控制寄存器 的英文怎麼說

中文拼音 [kòngzhìjìcúnqì]
控制寄存器 英文
control register
  • 控 : 動詞1 （告發;控告） accuse; charge 2 （控制） control; dominate 3 （使容器口兒朝下 讓裏面的液體慢...
  • 制 : Ⅰ動詞1 （製造） make; manufacture 2 （擬訂; 規定） draw up; establish 3 （用強力約束; 限定; 管束...
  • 存 : 動詞1 （存在; 生存） exist; live; survive 2 （儲存; 保存） store; keep 3 （蓄積; 聚集） accumulat...
  • 器 : 名詞1. （器具） implement; utensil; ware 2. （器官） organ 3. （度量; 才能） capacity; talent 4. （姓氏） a surname
  • 控制 : control; dominate; regulate; govern; manage; check; cybernate; manipulate; encraty; rule; rein; c...
  1. Applying two perpendicular polarized light states and a no - light state to express information, this new theoretical system covers : a ) whole architecture constructed from light processing, light transmission, electric control and photoelectric input and output ; b ) various computing units mainly consist of liquid crystal element and polarimeter ; c ) light bus mainly consists of interlinkage optic valves ; d ) ternary memory formed from semiconductor memory ; e ) register formed from optic fiber ring ; and i ) huge - numeral management based on the new concept of calculating path and calculating channel

    這個理論包括：光處理、光傳送、電控制、綜合輸入輸出的總體結構；以液晶元件和偏振器為主的各類運算器結構；以互連光閥為主的光空間總線；以半導體存儲器為主的三值數據存儲器結構；以光纖環為主的寄存器結構；以算位、算道新概念為基礎的巨位數管理方案等。
  2. The chip simulation network laboratory system this paper disguessed is a distribute network simulation system based on lan. the system ' s architecture is a c / s of three lays. the front platform are the chip simulation network system application program terminer ; the middle lay is a dcom server, it ' s duty is to deal with the communication and data transmission between the terminer and then database server, and to execute the logical operation. the application program just connect with the middle lay and get data from it, the connection and operation with database server will be managed by the dcom server. the duty of database server is to access and backup the final data

    具體是由位於網路各個終端的晶元模擬網路實驗系統應用程序為前臺；中間層為dcom應用程序服務器，負責處理前臺應用程序與后臺數據庫的通信和數據傳輸，並執行業務邏輯，前臺應用程序只需要與應用程序服務器建立連接，在中間層操作數據即可，與后臺數據庫的連接和操作由應用程序服務器來統一管理操作。后臺數據庫只負責數據的存取操作。本論文實施的晶元模擬網路實驗系統模擬了主要的邏輯電路器件， 8088cpu ，存儲器，寄存器，數據總線，地址總線和控制總線，及其它相關晶元。
  3. Chapter two detailedly presents the design of the boundary scan testing system which is in accordance with ieee. 1149. correspondingly two special - used data registers are added, one of which is the scanning chain register and the other is the child scanning chain control - register

    文中第二章按照ieee . 1149標準詳細設計了邊緣掃描測試系統，相應增加了兩個專用數據寄存器，其中一個為掃描鏈寄存器，一個為掃描子鏈控制寄存器。
  4. The core is based on harvard architecture with 16 - bit instruction length and 8 - bit data length. the performance of mcu has been improved greatly by introducing single - clock - cycle instructions, setting multiple high - speed working registers and replacing micro - program with direct logic block etc. to keep the mcu core reusable and transplantable, the whole mcu core has been coded for synthesis in verilog hdl

    該mcu核採用哈佛結構、 16位指令字長和8位數據字長，通過設計單周期指令、在內部設置多個快速寄存器及採用硬布線邏輯代替微程序控制的方法，加快了微處理器的速度，提高了指令的執行效率。
  5. System calls. when an emulator ordinarily encounters a powerpc system call instruction, it emulates the exception by storing the instruction address into the srr0 register, setting some architecture - defined bits in srr1, and transferring control to physical address 0xc00. some powerpc variants allow more control over this behavior, but this is the traditional powerpc model

    當模擬器正常地碰到一個powerpc系統調用指令時，它便將指令地址存入到srr0寄存器，設置srr1中某些體系結構定義的位，並將控制權轉交給物理地址0xc00 ，從而模擬這個異常（有些powerpc的變種允許對這種行為有更多的控制，但是這里的這種是傳統的powerpc模型） 。
  6. Lcd will display wanted data by writing data to specified instruction register and specified data register through control bus and data bus, which makes operation easier

    只要通過數據線和控制線對指定的寄存器進行操作即可對想要顯示的數據進行顯示，開發起來很容易。
  7. The part of execution in which an operand or instruction is read from main stora ge and written into a control unit or arithmetic unit register

    執行過程中的一個階段所需的時間，在此期間，計算機從主存儲器中取出指令或操作數，並將其存入控制器或運算器的寄存器中。
  8. Information technology - international standardized profiles fvt2nn - virtual terminal basic class - register of control object type definitions - fvt218 - logical image control object

    信息技術.國際標準化輪廓fvt2nn .虛擬終端基本類型.控制目標類型定義的寄存器. fvt218 .邏輯圖象控制目標
  9. Information technology. international standardized profiles fvt2nn. virtual terminal basic class. register of control object type definitions. part 5 : fvt218. logical image control object. european standard en isp 11185 - 5

    信息技術.國際標準輪廓fvt2nn .虛擬終端基本類型.控制目標類型定義的寄存器. fvt218 .邏輯圖象控制目標
  10. The floating - point status and control register fpscr captures status and exceptions resulting from floating - point operations, and the fpscr also provides control bits for enabling specific exception types, as well as for selecting one of the four rounding modes

    浮點狀態和控制寄存器（ fpscr ）捕獲浮點操作的狀態和異常結果， fpscr還具有控制位，以支持特定的異常類型和對四種舍入模式之一的選擇。
  11. Currently, the control registers cannot be modified

    目前，不能修改控制寄存器。
  12. Displays the processor s control registers ; with the

    顯示處理器的控制寄存器；如果帶有
  13. Configuration control register

    配置控制寄存器
  14. Computer control register

    計算機控制寄存器
  15. Scanning control register

    掃描控制寄存器
  16. From the point of view of the device, say the floppy disk controller, it will see only the address space that its control registers are in ( isa ), and not the system memory

    從設備的角度來看，比如說軟盤控制器，它只能看到在isa總線上的控制寄存器而不是系統內存。
  17. With these data structures, code modules, and system registers initialized, the processor can be switched to protected mode by loading control register cr0 with a value that sets the pe flag ( bit 0 )

    當設置好這些數據結構，代碼段以及系統寄存器之後，可以通過設置控制寄存器cr0的pe位（第0位）為1來進入保護模式。
  18. Also a test system is set up, and the work status of the system is controlled by single chip to download the data of initial registers and control registesr. and the logical analyzer is used to sampling the output signals

    搭建了一個驗證系統，通過單片機來配置初始化寄存器和控制寄存器的值來控制系統的工作狀態，用邏輯分析儀採集輸出的信號。
  19. Making use of the powerful capabilities of the pci chip, high - speed data of the dsp platform are transferred both ways at dma mode, and low speed data such as initialization and configuration information are transferred at direct slave mode. this paper shows in detail the workings of pci9054, the configuration of its control register, and the writing of platform driver with api functions provided by the manufacturer

    利用pci介面晶元的強大功能，本文提出了採用dma模式雙向傳輸dsp平臺的高速數據，採用從模式傳輸初始化信息及配置信息等低速數據，並詳細介紹了pci9054的工作方式，控制寄存器的配置以及調用廠商提供的api函數編寫平臺驅動程序。
  20. The configure file is downloaded into the fpga chip according to the fpga design fl ow. also a test system is set up, and the work status of the system is controlled by single chip to download the data of initial registers and control registesr. and the logical analyzer is used to sampling the output signals

    使用xillinx的fpgaxc2550pq208 ，經過fpga的實現流程，把配置文件配置到xczs5opqzos ，搭建了一個驗證系統，通過單片機來對各控制寄存器寫入控制字來控制系統的工作狀態，用邏輯分析儀採集輸出的信號。
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